Jitendra Bhandari
Orcid: 0000-0003-1017-1690
According to our database1,
Jitendra Bhandari
authored at least 24 papers
between 2021 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
ACM Trans. Design Autom. Electr. Syst., July, 2025
CoRR, June, 2025
CoRR, June, 2025
CoRR, June, 2025
CoRR, March, 2025
VeriLeaky: Navigating IP Protection vs Utility in Fine-Tuning for LLM-Driven Verilog Coding.
CoRR, March, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
RTL-Breaker: Assessing the Security of LLMs Against Backdoor Attacks on HDL Code Generation.
Proceedings of the Design, Automation & Test in Europe Conference, 2025
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024
Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AI.
CoRR, 2024
SENTAUR: Security EnhaNced Trojan Assessment Using LLMs Against Undesirable Revisions.
CoRR, 2024
ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search.
CoRR, 2024
CoRR, 2024
ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024
2023
IEEE Trans. Very Large Scale Integr. Syst., October, 2023
Proceedings of the 5th ACM/IEEE Workshop on Machine Learning for CAD, 2023
2022
Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021