Jitendra Bhandari

According to our database, Jitendra Bhandari authored at least 25 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2025

ARIANNA: An Automatic Design Flow for Fabric Customization and eFPGA Redaction.

Luca Collini, Jitendra Bhandari, Chiara Muscari Tomajoli, Abdul Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato

ACM Trans. Design Autom. Electr. Syst., July, 2025

VeriLoC: Line-of-Code Level Prediction of Hardware Design Quality from Verilog Code.

Raghu Vamshi Hemadri, Jitendra Bhandari, Andre Nakkab, Johann Knechtel, Badri P. Gopalan, Ramesh Narayanaswamy, Ramesh Karri, Siddharth Garg

CoRR, June, 2025

SALAD: Systematic Assessment of Machine Unlearing on LLM-Aided Hardware Design.

Zeng Wang, Minghao Shao, Rupesh Raj Karn, Likhitha Mankali, Jitendra Bhandari, Ramesh Karri, Ozgur Sinanoglu, Muhammad Shafique, Johann Knechtel

CoRR, June, 2025

ARIANNA: An Automatic Design Flow for Fabric Customization and eFPGA Redaction.

Luca Collini, Jitendra Bhandari, Chiara Muscari Tomajoli, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato

CoRR, June, 2025

VeriContaminated: Assessing LLM-Driven Verilog Coding for Data Contamination.

Zeng Wang, Minghao Shao, Jitendra Bhandari, Likhitha Mankali, Ramesh Karri, Ozgur Sinanoglu, Muhammad Shafique, Johann Knechtel

CoRR, March, 2025

VeriLeaky: Navigating IP Protection vs Utility in Fine-Tuning for LLM-Driven Verilog Coding.

Zeng Wang, Minghao Shao, Mohammed Nabeel, Prithwish Basu Roy, Likhitha Mankali, Jitendra Bhandari, Ramesh Karri, Ozgur Sinanoglu, Muhammed Shafique, Johann Knechtel

CoRR, March, 2025

DEFending Integrated Circuit Layouts.

Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri

IEEE Trans. Inf. Forensics Secur., 2025

SALAD: Systematic Assessment of Machine Unlearning on LLM-Aided Hardware Design.

Zeng Wang, Minghao Shao, Rupesh Raj Karn, Likhitha Mankali, Jitendra Bhandari, Ramesh Karri, Ozgur Sinanoglu, Muhammad Shafique, Johann Knechtel

Proceedings of the 7th ACM/IEEE Symposium on Machine Learning for CAD, 2025

LiCSPA: Lightweight Countermeasure against Static Power Side-Channel Attacks.

Jitendra Bhandari, Mohammed Nabeel, Likhitha Mankali, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

RTL-Breaker: Assessing the Security of LLMs Against Backdoor Attacks on HDL Code Generation.

Lakshmi Likhitha Mankali, Jitendra Bhandari, Manaar Alam, Ramesh Karri, Michail Maniatakos, Ozgur Sinanoglu, Johann Knechtel

Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024

Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AI.

Jitendra Bhandari, Vineet Bhat, Yuheng He, Siddharth Garg, Hamed Rahmani, Ramesh Karri

CoRR, 2024

SENTAUR: Security EnhaNced Trojan Assessment Using LLMs Against Undesirable Revisions.

Jitendra Bhandari, Rajat Sadhukhan, Prashanth Krishnamurthy, Farshad Khorrami, Ramesh Karri

CoRR, 2024

ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search.

Jitendra Bhandari, Animesh Basak Chowdhury, Mohammed Nabeel, Ozgur Sinanoglu, Siddharth Garg, Ramesh Karri, Johann Knechtel

CoRR, 2024

LLM-Aided Testbench Generation and Bug Detection for Finite-State Machines.

Jitendra Bhandari, Johann Knechtel, Ramesh Narayanaswamy, Siddharth Garg, Ramesh Karri

CoRR, 2024

Lightweight Masking Against Static Power Side-Channel Attacks.

Jitendra Bhandari, Mohammed Thari Nabeel, Likhitha Mankali, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel

CoRR, 2024

ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search.

Jitendra Bhandari, Animesh Basak Chowdhury, Ozgur Sinanoglu, Siddharth Garg, Ramesh Karri, Johann Knechtel

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection.

Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

2023

Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction.

Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri

IEEE Trans. Very Large Scale Integr. Syst., October, 2023

Beware Your Standard Cells! On Their Role in Static Power Side-Channel Attacks.

Jitendra Bhandari, Likhitha Mankali, Mohammed Nabeel, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel

IACR Cryptol. ePrint Arch., 2023

DEFending Integrated Circuit Layouts.

Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ramesh Karri

IACR Cryptol. ePrint Arch., 2023

ConVERTS: Contrastively Learning Structurally InVariant Netlist Representations.

Animesh Basak Chowdhury, Jitendra Bhandari, Luca Collini, Ramesh Karri, Benjamin Tan, Siddharth Garg

Proceedings of the 5th ACM/IEEE Workshop on Machine Learning for CAD, 2023

2022

Benchmarking Security Closure of Physical Layouts: ISPD 2022 Contest.

Johann Knechtel, Jayanth Gopinath, Mohammed Ashraf, Jitendra Bhandari, Ozgur Sinanoglu, Ramesh Karri

Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

ALICE: an automatic design flow for eFPGA redaction.

Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

Security Closure of Physical Layouts ICCAD Special Session Paper.

Johann Knechtel, Jayanth Gopinath, Jitendra Bhandari, Mohammed Ashraf, Hussam Amrouch, Shekhar Borkar, Sung Kyu Lim, Ozgur Sinanoglu, Ramesh Karri

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Exploring eFPGA-based Redaction for IP Protection.

Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021