Juan Miguel De Haro Ruiz

According to our database, Juan Miguel De Haro Ruiz authored at least 6 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Enabling HW-Based Task Scheduling in Large Multicore Architectures.

Lucas Morais, Carlos Álvarez, Daniel Jiménez-González, Juan Miguel De Haro Ruiz, Guido Araujo, Michael Frank, Alfredo Goldman, Xavier Martorell

IEEE Trans. Computers, January, 2024

2023

WFAsic: A High-Performance ASIC Accelerator for DNA Sequence Alignment on a RISC-V SoC.

Abbas Haghi, Lluc Alvarez, Jordi Fornt, Juan Miguel De Haro Ruiz, Roger Figueras, Max Doblas, Santiago Marco-Sola, Miquel Moretó

Proceedings of the 52nd International Conference on Parallel Processing, 2023

2022

OmpSs@cloudFPGA: An FPGA Task-Based Programming Model with Message Passing.

Juan Miguel De Haro Ruiz, Rubén Cano, Carlos Álvarez, Daniel Jiménez-González, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, François Abel, Burkhard Ringlein, Beat Weiss

Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022

Towards Reconfigurable Accelerators in HPC: Designing a Multipurpose eFPGA Tile for Heterogeneous SoCs.

Tim Hotfilter, Fabian Kreß, Fabian Kempf, Jürgen Becker, Juan Miguel De Haro Ruiz, Daniel Jiménez-González, Miquel Moretó, Carlos Álvarez, Jesús Labarta, Imen Baili

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

OmpSs@FPGA Framework for High Performance FPGA Computing.

Juan Miguel De Haro Ruiz, Jaume Bosch, Antonio Filgueras, Miquel Vidal, Daniel Jiménez-González, Carlos Álvarez, Xavier Martorell, Eduard Ayguadé, Jesús Labarta

IEEE Trans. Computers, 2021

2019

Racing to Hardware-Validated Simulation.

Almutaz Adileh, Cecilia González-Alvarez, Juan Miguel De Haro Ruiz, Lieven Eeckhout

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019