Daniele Cattaneo

Orcid: 0000-0003-1453-3257

Affiliations:
  • Politecnico di Milano, Milan, Italy


According to our database1, Daniele Cattaneo authored at least 21 papers between 2018 and 2024.

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Bibliography

2024
Precision Tuning the Rust Memory-Safe Programming Language.
Proceedings of the 15th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 13th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2024

2023
Array-Aware Matching: Taming the Complexity of Large-Scale Simulation Models.
ACM Trans. Math. Softw., September, 2023

Mixed Precision in Heterogeneous Parallel Computing Platforms via Delayed Code Analysis.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

Hardware and Software Support for Mixed Precision Computing: a Roadmap for Embedded and HPC Systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Clever DAE: Compiler Optimizations for Digital Twins at Scale.
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022
TAFFO: The compiler-based precision tuner.
SoftwareX, December, 2022

Towards EXtreme scale technologies and accelerators for euROhpc hw/Sw supercomputing applications for exascale: The TEXTAROSSA approach.
Microprocess. Microsystems, November, 2022

Efficient Memory Management for Modelica Simulations.
Proceedings of the 13th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2022

Precision Tuning in Parallel Applications.
Proceedings of the 13th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2022

Ahead-Of-Real-Time (ART): A Methodology for Static Reduction of Worst-Case Execution Time.
Proceedings of the Third Workshop on Next Generation Real-Time Embedded Systems, 2022

2021
FixM: Code generation of fixed point mathematical functions.
Sustain. Comput. Informatics Syst., 2021

The Impact of Precision Tuning on Embedded Systems Performance: A Case Study on Field-Oriented Control.
Proceedings of the 12th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and 10th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2021


Architecture-aware Precision Tuning with Multiple Number Representation Systems.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Machine Learning Techniques for Urban Vehicle Localization.
PhD thesis, 2020

Dynamic Precision Autotuning with TAFFO.
ACM Trans. Archit. Code Optim., 2020

TAFFO: Tuning Assistant for Floating to Fixed Point Optimization.
IEEE Embed. Syst. Lett., 2020

Automated Precision Tuning in Activity Classification Systems: A Case Study.
Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2020

2019
Feedback-Driven Performance and Precision Tuning for Automatic Fixed Point Exploitation.
Proceedings of the Parallel Computing: Technology Trends, 2019

Fixed point exploitation via compiler analyses and transformations: POSTER.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2018
Embedded Operating System Optimization through Floating to Fixed Point Compiler Transformation.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018


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