Junjie An
Orcid: 0009-0008-4893-7907
According to our database1,
Junjie An
authored at least 7 papers
between 2019 and 2024.
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Bibliography
2024
Write-Verify-Free MLC RRAM Using Nonbinary Encoding for AI Weight Storage at the Edge.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024
2023
Multicore Spiking Neuromorphic Chip in 180-nm With ReRAM Synapses and Digital Neurons.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023
A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference.
IEEE J. Solid State Circuits, October, 2023
2022
RRAM Computing-in-Memory Using Transient Charge Transferring for Low-Power and Small-Latency AI Edge Inference.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
Sparsity-Aware Clamping Readout Scheme for High Parallelism and Low Power Nonvolatile Computing-in-Memory Based on Resistive Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
RRAM-based Analog-Weight Spiking Neural Network Accelerator with in-situ Learning for IoT Applications.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2019
Heterojunction Diode Shielded SiC Split-Gate Trench MOSFET With Optimized Reverse Recovery Characteristic and Low Switching Loss.
IEEE Access, 2019