Kevin Zhang
This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.
Bibliography
2024
IEEE Robotics Autom. Lett., February, 2024
IEEE Access, 2024
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
Using machine learning to develop a clinical prediction model for SSRI-associated bleeding: a feasibility study.
BMC Medical Informatics Decis. Mak., December, 2023
Brake-Signal-Based Driver's Location Tracking in Usage-Based Auto Insurance Programs.
IEEE Internet Things J., 2023
ConVRT: Consistent Video Restoration Through Turbulence with Test-time Optimization of Neural Video Representations.
CoRR, 2023
CoRR, 2023
G-MATT: Single-step Retrosynthesis Prediction using Molecular Grammar Tree Transformer.
CoRR, 2023
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
PiMAE: Point Cloud and Image Interactive Masked Autoencoders for 3D Object Detection.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
Mortar: Morphing the Bit Level Sparsity for General Purpose Deep Learning Acceleration.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
2022
Mission-level Robustness with Rapidly-deployed, Autonomous Aerial Vehicles by Carnegie Mellon Team Tartan at MBZIRC 2020.
Field Robotics, March, 2022
CoRR, 2022
Exploiting Parallelism of Disk Failure Recovery via Partial Stripe Repair for an Erasure-Coded High-Density Storage Server.
Proceedings of the 51st International Conference on Parallel Processing, 2022
2021
Computational Modeling of Gene-Specific Transcriptional Repression, Activation and Chromatin Interactions in Leukemogenesis by LASSO-Regularized Logistic Regression.
IEEE ACM Trans. Comput. Biol. Bioinform., 2021
Carnegie Mellon Team Tartan: Mission-level Robustness with Rapidly Deployed Autonomous Aerial Vehicles in the MBZIRC 2020.
CoRR, 2021
A Low-Cost Compliant Gripper Using Cooperative Mini-Delta Robots for Dexterous Manipulation.
Proceedings of the Robotics: Science and Systems XVII, Virtual Event, July 12-16, 2021., 2021
Flexible Network Interface (FNI): A Mission-centric Integration Framework for Next Generation DoD SATCOM Networks.
Proceedings of the 2021 IEEE Military Communications Conference, 2021
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2021 - 24th International Conference, Strasbourg, France, September 27, 2021
Examining Autonomous Vehicle Operating Systems Vulnerabilities using a Cyber-Physical Approach.
Proceedings of the 24th IEEE International Intelligent Transportation Systems Conference, 2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
IEEE Trans. Computational Imaging, 2020
Heart failure-induced atrial remodelling promotes electrical and conduction alternans.
PLoS Comput. Biol., 2020
CoRR, 2020
Playing with Food: Learning Food Item Representations Through Interactive Exploration.
Proceedings of the Experimental Robotics - The 17th International Symposium, 2020
Localization and Force-Feedback with Soft Magnetic Stickers for Precise Robot Manipulation.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2020
2019
Proceedings of the 2019 IEEE Military Communications Conference, 2019
Proceedings of the 34th IEEE/ACM International Conference on Automated Software Engineering, 2019
Proceedings of the 19th IEEE-RAS International Conference on Humanoid Robots, 2019
2018
Proceedings of the 2018 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2018
Proceedings of the 17th International Conference on Autonomous Agents and MultiAgent Systems, 2018
2017
5.6 Mb/mm<sup>2</sup> 1R1W 8T SRAM Arrays Operating Down to 560 mV Utilizing Small-Signal Sensing With Charge Shared Bitline and Asymmetric Sense Amplifier in 14 nm FinFET CMOS Technology.
IEEE J. Solid State Circuits, 2017
Automated classification of eligibility criteria in clinical trials to facilitate patient-trial matching for specific patient populations.
J. Am. Medical Informatics Assoc., 2017
Proceedings of the 2017 IEEE Military Communications Conference, 2017
2016
A High-Density Metal-Fuse Technology Featuring a 1.6 V Programmable Low-Voltage Bit Cell With Integrated 1 V Charge Pumps in 22 nm Tri-Gate CMOS.
IEEE J. Solid State Circuits, 2016
A 0.6 V, 1.5 GHz 84 Mb SRAM in 14 nm FinFET CMOS Technology With Capacitive Charge-Sharing Write Assist Circuitry.
IEEE J. Solid State Circuits, 2016
A 0.9um<sup>2</sup> 1T1R bit cell in 14nm SoC process for metal-fuse OTP array with hierarchical bitline, bit level redundancy, and power gating.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
17.2 5.6Mb/mm2 1R1W 8T SRAM arrays operating down to 560mV utilizing small-signal sensing with charge-shared bitline and asymmetric sense amplifier in 14nm FinFET CMOS technology.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Proceedings of the 2016 on International Symposium on Physical Design, 2016
2015
IEEE J. Solid State Circuits, 2015
Low-voltage metal-fuse technology featuring a 1.6V-programmable 1T1R bit cell with an integrated 1V charge pump in 22nm tri-gate process.
Proceedings of the Symposium on VLSI Circuits, 2015
A 0.094um<sup>2</sup> high density and aging resilient 8T SRAM with 14nm FinFET technology featuring 560mV VMIN with read and write assist.
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
2<sup>nd</sup> generation embedded DRAM with 4X lower self refresh power in 22nm Tri-Gate CMOS technology.
Proceedings of the Symposium on VLSI Circuits, 2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2013
A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry.
IEEE J. Solid State Circuits, 2013
Proceedings of the 2013 IEEE Seventh International Conference on Semantic Computing, 2013
Proceedings of the 18th International Conference on Intelligent User Interfaces, 2013
2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A 4.6GHz 162Mb SRAM design in 22nm tri-gate CMOS technology with integrated active VMIN-enhancing assist circuitry.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 38th European Solid-State Circuit conference, 2012
2011
A 32 nm High-k Metal Gate SRAM With Adaptive Dynamic Stability Enhancement for Low-Voltage Operation.
IEEE J. Solid State Circuits, 2011
IEEE Des. Test Comput., 2011
Proceedings of the 14th International IEEE Conference on Intelligent Transportation Systems, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2010
A 4.0 GHz 291 Mb Voltage-Scalable SRAM Design in a 32 nm High-k + Metal-Gate CMOS Technology With Integrated Power Management.
IEEE J. Solid State Circuits, 2010
IEEE J. Solid State Circuits, 2010
A 4 kb Metal-Fuse OTP-ROM Macro Featuring a 2 V Programmable 1.37 μ m <sup>2</sup> <i>1T1R</i> Bit Cell in 32 nm High-k Metal-Gate CMOS.
IEEE J. Solid State Circuits, 2010
A 32nm High-k metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
Process, Temperature, and Supply-Noise Tolerant 45nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits.
IEEE J. Solid State Circuits, 2009
A 3.8 GHz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology.
IEEE J. Solid State Circuits, 2009
A 4.0 GHz 291Mb voltage-scalable SRAM design in 32nm high-κ metal-gate CMOS with integrated power management.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
2008
A 1.1 GHz 12 µA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications.
IEEE J. Solid State Circuits, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-Κ Metal-Gate CMOS Technology.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
A 256-Kb Dual-V<sub>CC</sub> SRAM Building Block in 65-nm CMOS Process With Actively Clamped Sleep Transistor.
IEEE J. Solid State Circuits, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2006
A 3-GHz 70-mb SRAM in 65-nm CMOS technology with integrated column-based dynamic power supply.
IEEE J. Solid State Circuits, 2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
2005
SRAM design on 65-nm CMOS technology with dynamic sleep transistor for leakage reduction.
IEEE J. Solid State Circuits, 2005
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
2002
XACCT's Common Reliable Accounting for Network Element (CRANE) Protocol Specification Version 1.0.
RFC, November, 2002
Analysis of dual-V<sub>T</sub> SRAM cells with full-swing single-ended bit line sensing for on-chip cache.
IEEE Trans. Very Large Scale Integr. Syst., 2002
Proceedings of the First Workshop on Chinese Language Processing, 2002