Kyowon Jin
According to our database1,
Kyowon Jin
authored at least 5 papers
between 2009 and 2022.
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Bibliography
2022
A 1-Tb, 4b/Cell, 176-Stacked-WL 3D-NAND Flash Memory with Improved Read Latency and a 14.8Gb/mm2 Density.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
A 176-Stacked 512Gb 3b/Cell 3D-NAND Flash with 10.8Gb/mm<sup>2</sup> Density with a Peripheral Circuit Under Cell Array Architecture.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
A 1.1-V 10-nm Class 6.4-Gb/s/Pin 16-Gb DDR5 SDRAM With a Phase Rotator-ILO DLL, High-Speed SerDes, and DFE/FFE Equalization Scheme for Rx/Tx.
IEEE J. Solid State Circuits, 2020
22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2009
A Fast Built-in Redundancy Analysis for Memories With Optimal Repair Rate Using a Line-Based Search Tree.
IEEE Trans. Very Large Scale Integr. Syst., 2009