Ritik Raj

According to our database, Ritik Raj authored at least 4 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A 475 MHz Manycore FPGA Accelerator for RTL Simulation.

Sahand Kashani, Mahyar Emami, Keisuke Kamahori, Mohammad Sepehr Pourghannad, Ritik Raj, James R. Larus

Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

2023

Manticore: Hardware-Accelerated RTL Simulation with Static Bulk-Synchronous Parallelism.

Mahyar Emami, Sahand Kashani, Keisuke Kamahori, Mohammad Sepehr Pourghannad, Ritik Raj, James R. Larus

Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022

A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing.

Dinesh Kushwaha, Aditya Sharma, Neha Gupta, Ritik Raj, Ashish Joshi, Jwalant Mishra, Rajat Kohli, Sandeep Miryala, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

AutIS: Artificial Intelligent Based Automated Interviewing System.

Rupesh Kumar Dewang, Arpit Gupta, Anisha Kumari, Ritik Raj, Akanksha Gupta, Raj Nath Shah, Tanmay Jaiswal, Arvind Mewada

Proceedings of the Hybrid Intelligent Systems, 2021