Jianming Tong

Orcid: 0000-0001-8436-2946

According to our database1, Jianming Tong authored at least 24 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Adapting AlphaEvolve to Optimize Fully Homomorphic Encryption on TPUs.
CoRR, May, 2026

Enabling AI ASICs for Zero Knowledge Proof.
CoRR, April, 2026

Privatar: Scalable Privacy-preserving Multi-user VR via Secure Offloading.
CoRR, April, 2026

SCALE-Sim TPU: Validating and Extending SCALE-Sim for TPUs.
CoRR, March, 2026

Breaking Rules, Building Trust: A Fireside Chat With Prof. Todd Austin.
IEEE Micro, 2026

MINISA: Minimal Instruction Set Architecture for Next-gen Reconfigurable Inference Accelerator.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2026

Leveraging ASIC AI Chips for Homomorphic Encryption.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

2025


Leveraging ASIC AI Chips for Homomorphic Encryption.
CoRR, January, 2025

Sipping Matcha of Security: A Fireside Chat With Mengjia Yan.
IEEE Micro, 2025

Exploring Constrained Dataflow Accelerators for Real-Time Multi-Task Multi-Model Ml Workloads.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2025

SCALE-Sim V3: a Modular Cycle-Accurate Systolic Accelerator Simulator for End-To-End System Analysis.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2025

SquareLoop: Explore Optimal Authentication Block Strategy for ML.
Proceedings of the 14th International Workshop on Hardware and Architectural Support for Security and Privacy, 2025

2024
Accurate Low-Degree Polynomial Approximation of Non-Polynomial Operators for Fast Private Inference in Homomorphic Encryption.
Proceedings of the Seventh Annual Conference on Machine Learning and Systems, 2024

FEATHER: A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

2023
On Continuing DNN Accelerator Architecture Scaling Using Tightly Coupled Compute-on-Memory 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst., October, 2023

Hardware-Software Co-Design for Real-Time Latency-Accuracy Navigation in Tiny Machine Learning Applications.
IEEE Micro, 2023

Subgraph Stationary Hardware-Software Inference Co-Design.
Proceedings of the Sixth Conference on Machine Learning and Systems, 2023

SNATCH: Stealing Neural Network Architecture from ML Accelerator in Intelligent Sensors.
Proceedings of the 2023 IEEE SENSORS, Vienna, Austria, October 29 - Nov. 1, 2023, 2023

2021
PIT: Processing-In-Transmission With Fine-Grained Data Manipulation Networks.
IEEE Trans. Computers, 2021

SMMR-Explore: SubMap-based Multi-Robot Exploration System with Multi-robot Multi-target Potential Field Exploration Method.
Proceedings of the IEEE International Conference on Robotics and Automation, 2021

ac<sup>2</sup>SLAM: FPGA Accelerated High-Accuracy SLAM with Heapsort and Parallel Keypoint Extractor.
Proceedings of the International Conference on Field-Programmable Technology, 2021

2020
COCOA: Content-Oriented Configurable Architecture Based on Highly-Adaptive Data Transmission Networks.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020


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