Santiago Pagani

Orcid: 0000-0002-5088-0347

According to our database1, Santiago Pagani authored at least 30 papers between 2012 and 2020.

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Bibliography

2020
Combinatorial Auctions for Temperature-Constrained Resource Management in Manycores.
IEEE Trans. Parallel Distributed Syst., 2020

Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Towards Highly Specialized, POSIX -compliant Software Stacks with Unikraft: Work-in-Progress.
Proceedings of the 20th International Conference on Embedded Software, 2020

2018
Chapter Four - Dark Silicon Aware Resource Management for Many-Core Systems.
Adv. Comput., 2018

Compiler-driven error analysis for designing approximate accelerators.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Design Space Exploration and Run-Time Adaptation for Multicore Resource Management Under Performance and Power Constraints.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

Energy Efficiency for Clustered Heterogeneous Multicores.
IEEE Trans. Parallel Distributed Syst., 2017

Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon.
IEEE Trans. Computers, 2017

Power Density-Aware Resource Management for Heterogeneous Tiled Multicores.
IEEE Trans. Computers, 2017

Ultra-low power and dependability for IoT devices (Invited paper for IoT technologies).
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Power, Energy, and Thermal Management for Clustered Manycores.
PhD thesis, 2016

Dark silicon management: an integrated and coordinated cross-layer approach.
it Inf. Technol., 2016

An Energy-Efficient Middleware for Computation Offloading in Real-Time Embedded Systems.
Proceedings of the 22nd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2016

Towards performance and reliability-efficient computing in the dark silicon era.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Energy Efficiency on Multi-Core Architectures with Multiple Voltage Islands.
IEEE Trans. Parallel Distributed Syst., 2015

Runtime Resource Allocation for Software Pipelines.
ACM Trans. Parallel Comput., 2015

Energy and Peak Power Efficiency Analysis for the Single Voltage Approximation (SVA) Scheme.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Power management for mobile games on asymmetric multi-cores.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Thermal-aware power budgeting for dark silicon chips.
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015

MatEx: efficient transient and peak temperature computation for compact thermal models.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips.
Proceedings of the 52nd Annual Design Automation Conference, 2015

New trends in dark silicon.
Proceedings of the 52nd Annual Design Automation Conference, 2015

seBoost: Selective boosting for heterogeneous manycores.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

2014
Energy Efficiency Analysis for the Single Frequency Approximation (SFA) Scheme.
ACM Trans. Embed. Comput. Syst., 2014

Peak Power Management for scheduling real-time tasks on heterogeneous many-core systems.
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014

TSP: Thermal Safe Power - Efficient power budgeting for many-core systems in dark silicon.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

2013
Energy Efficient Task Partitioning Based on the Single Frequency Approximation Scheme.
Proceedings of the IEEE 34th Real-Time Systems Symposium, 2013

MOMA: mapping of memory-intensive software-pipelined applications for systems with multiple memory controllers.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Optimizations for configuring and mapping software pipelines in many core systems.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Work in Progress: Malleable Software Pipelines for Efficient Many-core System Utilization.
Proceedings of the 6th Many-core Applications Research Community (MARC) Symposium. Proceedings of the 6th MARC Symposium, 2012


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