Andrés Otero
Orcid: 0000-0003-4995-7009
According to our database1,
Andrés Otero
authored at least 48 papers
between 2010 and 2023.
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Bibliography
2023
Dynamically reconfigurable variable-precision sparse-dense matrix acceleration in Tensorflow Lite.
Microprocess. Microsystems, April, 2023
A Framework for Fast Prototyping of Photo-realistic Environments with Multiple Pedestrians.
Proceedings of the IEEE International Conference on Robotics and Automation, 2023
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023
2022
Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.
IEEE Trans. Computers, 2022
Proceedings of the 13th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
A Multi-FPGA Scalable Framework for Deep Reinforcement Learning Through Neuroevolution.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2022
2021
Multi-grain reconfigurable and scalable overlays for hardware accelerator composition.
J. Syst. Archit., 2021
A Machine-Learning-Based Distributed System for Fault Diagnosis With Scalable Detection Quality in Industrial IoT.
IEEE Internet Things J., 2021
Run-Time Monitoring and ML-Based Modeling in Reconfigurable Multi-Accelerator Systems.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021
2020
An Integrated Approach and Tool Support for the Design of FPGA-Based Multi-Grain Reconfigurable Systems.
IEEE Access, 2020
Exploiting Multi-Level Parallelism for Run-Time Adaptive Inverse Kinematics on Heterogeneous MPSoCs.
IEEE Access, 2020
Run-Time Reconfigurable MPSoC-Based On-Board Processor for Vision-Based Space Navigation.
IEEE Access, 2020
Automated Toolchain for Enhanced Productivity in Reconfigurable Multi-accelerator Systems.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020
2019
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019
Automated Tool and Runtime Support for Fine-Grain Reconfiguration in Highly Flexible Reconfigurable Systems.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019
2018
FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo<sup>3</sup> Framework.
Sensors, 2018
A Runtime-Scalable and Hardware-Accelerated Approach to On-Board Linear Unmixing of Hyperspectral Images.
Remote. Sens., 2018
IMPRESS: Automated Tool for the Implementation of Highly Flexible Partial Reconfigurable Systems with Xilinx Vivado.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018
Performance Analysis of SEE Mitigation Techniques on Zynq Ultrascale + Hardened Processing Fabrics.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
2017
Dynamic reconfiguration under RTEMS for fault mitigation and functional adaptation in SRAM-based SoPCs for space systems.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017
2016
J. Real Time Image Process., 2016
2015
Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis.
IET Inf. Secur., 2015
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
2014
Customized and automated routing repair toolset towards side-channel analysis resistant dual rail logic.
Microprocess. Microsystems, 2014
A dynamically adaptable bus architecture for trading-off among performance, consumption and dependability in Cyber-Physical Systems.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
2013
IEEE Trans. Computers, 2013
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
A self-adaptive image processing application based on evolvable and scalable hardware.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Noise-agnostic adaptive image filtering without training references on an evolvable hardware platform.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
A noise-agnostic self-adaptive image processing application based on evolvable hardware.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
2012
Sensors, 2012
Dreams: A tool for the design of dynamically reconfigurable embedded and modular systems.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Implementation techniques for evolvable HW systems: virtual VS. dynamic reconfiguration.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
On the automatic integration of hardware accelerators into FPGA-based embedded systems.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
2011
Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011
Run-Time Scalable Architecture for Deblocking Filtering in H.264/AVC-SVC Video Codecs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
A fast Reconfigurable 2D HW core architecture on FPGAs for evolvable Self-Adaptive Systems.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
2010
Adaptable Security in Wireless Sensor Networks by Using Reconfigurable ECC Hardware Coprocessors.
Int. J. Distributed Sens. Networks, 2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Proceedings of the Reconfigurable Computing: Architectures, 2010