Thomas R. Shiple

Gérard Berry

Formal Methods Syst. Des., 2012

2011

Multi-mode redundancy removal.

[BibT_eX]

[DOI]

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2002

Formula-Dependent Equivalence for Compositional CTL Model Checking.

[BibT_eX]

[DOI]

Formal Methods Syst. Des., 2002

Combinational equivalence checking through function transformation.

[BibT_eX]

[DOI]

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Simplifying Circuits for Formal Verification Using Parametric Representation.

[BibT_eX]

[DOI]

Proceedings of the Formal Methods in Computer-Aided Design, 4th International Conference, 2002

2001

Efficient control state-space search.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Non-linear Quantification Scheduling in Image Computation.

[BibT_eX]

[DOI]

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

2000

Smart Simulation Using Collaborative Formal and Simulation Engines.

[BibT_eX]

[DOI]

Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Building Circuits from Relations.

[BibT_eX]

[DOI]

Proceedings of the Computer Aided Verification, 12th International Conference, 2000

1999

Least fixpoint approximations for reachability analysis.

[BibT_eX]

[DOI]

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

1998

Techniques for Implicit State Enumeration of EFSMs.

[BibT_eX]

[DOI]

Adnan Aziz

Proceedings of the Formal Methods in Computer-Aided Design, 1998

Approximation and Decomposition of Binary Decision Diagrams.

[BibT_eX]

[DOI]

Proceedings of the 35th Conference on Design Automation, 1998

Hybrid Verification Using Saturated Simulation.

[BibT_eX]

[DOI]

Adnan Aziz

Proceedings of the 35th Conference on Design Automation, 1998

A Comparison of Presburger Engines for EFSM Reachability.

[BibT_eX]

[DOI]

Rajeev K. Ranjan

Proceedings of the Computer Aided Verification, 10th International Conference, 1998

1996

VIS.

[BibT_eX]

[DOI]

Gary D. Hachtel

Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996

Constructive Analysis of Cyclic Circuits.

[BibT_eX]

[DOI]

Gérard Berry

Hervé J. Touati

Proceedings of the 1996 European Design and Test Conference, 1996

VIS: A System for Verification and Synthesis.

[BibT_eX]

[DOI]

Gary D. Hachtel

Proceedings of the Computer Aided Verification, 8th International Conference, 1996

1994

Two-phase Logic Design by Hardware Flowcharts.

[BibT_eX]

[DOI]

Kevin Covey

Sandra Murdock

Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

Heuristic Minimization of BDDs Using Don't Cares.

[BibT_eX]

[DOI]

Ramin Hojati

Proceedings of the 31st Conference on Design Automation, 1994

HSIS: A BDD-Based Environment for Formal Verification.

[BibT_eX]

[DOI]

Proceedings of the 31st Conference on Design Automation, 1994

Formula-Dependent Equivalence for Compositional CTL Model Checking.

[BibT_eX]

[DOI]

Adnan Aziz

Vigyan Singhal

Proceedings of the Computer Aided Verification, 6th International Conference, 1994

1993

A Unified Approach to Language Containment and Fair CTL Model Checking.

[BibT_eX]

[DOI]

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

Automatic compositional minimization in CTL model checking.

[BibT_eX]

[DOI]

Massimiliano Chiodo

Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Automatic Reduction in CTL Compositional Model Checking.

[BibT_eX]

[DOI]

Massimiliano Chiodo