Tiancheng Wang

According to our database1, Tiancheng Wang authored at least 17 papers between 2006 and 2019.

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Bibliography

2019
A Hardware-Efficient Post-Processing Algorithm for Motion Compensated Frame Rate Up-Conversion.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Low rank constraint and spatial spectral total variation for hyperspectral image mixed denoising.
Signal Processing, 2018

Error performance and robustness of optimum quantum detection for MPSK signals in the presence of phase noise.
Proceedings of the International Symposium on Information Theory and Its Applications, 2018

Effect of Non-Symmetric Loss on Quantum Reading Using a Quasi-Bell State.
Proceedings of the International Symposium on Information Theory and Its Applications, 2018

2017
On Evaluating and Constraining Assertions Using Conflicts in Absent Scenarios.
Proceedings of the 26th IEEE Asian Test Symposium, 2017

2016
Functional Test Generation for Hard-to-Reach States Using Path Constraint Solving.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Abstraction-Guided Simulation Using Markov Analysis for Functional Verification.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

LOFT: A low-overhead fault-tolerant routing scheme for 3D NoCs.
Integration, 2016

Path constraint solving based test generation for observability-enhanced branch coverage.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

An accurate algorithm for computing mutation coverage in model checking.
Proceedings of the 2016 IEEE International Test Conference, 2016

Property Coverage Analysis Based Trustworthiness Verification for Potential Threats from EDA Tools.
Proceedings of the 25th IEEE Asian Test Symposium, 2016

2015
TURO: A lightweight turn-guided routing scheme for 3D NoCs.
Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015

TWiN: A Turn-Guided Reliable Routing Scheme for Wireless 3D NoCs.
Proceedings of the 24th IEEE Asian Test Symposium, 2015

2014
HARS: A High-Performance Reliable Routing Scheme for 3D NoCs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Functional test generation guided by steady-state probabilities of abstract design.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Path Constraint Solving Based Test Generation for Hard-to-Reach States.
Proceedings of the 22nd Asian Test Symposium, 2013

2006
Delay-Dependent Robust Stabilization for Uncertain Time-Delay Systems.
Proceedings of the Ninth International Conference on Control, 2006


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