Ting-Pu Tai

According to our database1, Ting-Pu Tai authored at least 10 papers between 2007 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Comprehensive Power-Aware ATPG Methodology for Complex Low-Power Designs.
Proceedings of the IEEE International Test Conference, 2022

2017
Automotive semiconductor test.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

2015
Diagnosis and Layout Aware (DLA) Scan Chain Stitching.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Diagnosing timing related cell internal defects for FinFET technology.
Proceedings of the VLSI Design, Automation and Test, 2015

2010
Test cycle power optimization for scan-based designs.
Proceedings of the 2011 IEEE International Test Conference, 2010

Case study of scan chain diagnosis and PFA on a low yield wafer.
Proceedings of the 2011 IEEE International Test Conference, 2010

2009
Scan Chain Diagnosis by Adaptive Signal Profiling with Manufacturing ATPG Patterns.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

Customized Algorithms for High Performance Memory Test in Advanced Technology Node.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008
Efficiently Performing Yield Enhancements by Identifying Dominant Physical Root Cause from Test Fail Data.
Proceedings of the 2008 IEEE International Test Conference, 2008

2007
Faster defect localization in nanometer technology based on defective cell diagnosis.
Proceedings of the 2007 IEEE International Test Conference, 2007


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