Xianzhang Chen

According to our database1, Xianzhang Chen
  • authored at least 27 papers between 2013 and 2018.
  • has a "Dijkstra number"2 of four.

Timeline

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Bibliography

2018
Towards the Design of Efficient and Consistent Index Structure with Minimal Write Activities for Non-Volatile Memory.
IEEE Trans. Computers, 2018

Synthesizing distributed pipelining systems with timing constraints via optimal functional unit assignment and communication selection.
J. Comput. Science, 2018

On the Design of Reliable Heterogeneous Systems via Checkpoint Placement and Core Assignment.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Efficient wear leveling for inodes of file systems on persistent memories.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Optimal Functional-Unit Assignment for Heterogeneous Systems Under Timing Constraint.
IEEE Trans. Parallel Distrib. Syst., 2017

Refinery swap: An efficient swap mechanism for hybrid DRAM-NVM systems.
Future Generation Comp. Syst., 2017

BOSS: An Efficient Data Distribution Strategy for Object Storage Systems With Hybrid Devices.
IEEE Access, 2017

Towards the design of optimal range assignment for elevator groups under fluctuant traffic loads.
Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017

UDORN: A design framework of persistent in-memory key-value database for NVM.
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017

Optimal functional unit assignment and voltage selection for pipelined MPSoC with guaranteed probability on time performance.
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017

2016
Properties of Self-Timed Ring Architectures for Deadlock-Free and Consistent Configuration Reaching Maximum Throughput.
Signal Processing Systems, 2016

Efficient Data Placement for Improving Data Access Performance on Domain-Wall Memory.
IEEE Trans. VLSI Syst., 2016

A New Design of In-Memory File System Based on File Virtual Address Framework.
IEEE Trans. Computers, 2016

A unified framework for designing high performance in-memory and hybrid memory file systems.
Journal of Systems Architecture - Embedded Systems Design, 2016

Performance Optimization for In-Memory File Systems on NUMA Machines.
Proceedings of the 17th International Conference on Parallel and Distributed Computing, 2016

The design and implementation of an efficient user-space in-memory file system.
Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016

Optimizing Data Placement of MapReduce on Ceph-Based Framework under Load-Balancing Constraint.
Proceedings of the 22nd IEEE International Conference on Parallel and Distributed Systems, 2016

Optimal Functional Assignment and Communication Selection under Timing Constraint for Self-Timed Pipelines.
Proceedings of the 13th International Conference on Embedded Software and Systems, 2016

The Design and Implementation of an Efficient Data Consistency Mechanism for In-Memory File Systems.
Proceedings of the 13th International Conference on Embedded Software and Systems, 2016

The design of an efficient swap mechanism for hybrid DRAM-NVM systems.
Proceedings of the 2016 International Conference on Embedded Software, 2016

Optimal functional-unit assignment and buffer placement for probabilistic pipelines.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

The Design and Implementation of a High-Performance Hybrid Memory File System.
Proceedings of the International Conference on Advanced Cloud and Big Data, 2016

2015
Designing an efficient persistent in-memory file system.
Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

Prevent Deadlock and Remove Blocking for Self-Timed Systems.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2015

On the Design of High-Performance and Energy-Efficient Probabilistic Self-Timed Systems.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Optimizing data placement for reducing shift operations on domain wall memories.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2013
Effective file data-block placement for different types of page cache on hybrid main memory architectures.
Design Autom. for Emb. Sys., 2013


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