Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

2021

Load-balanced Gather-scatter Patterns for Sparse Deep Neural Networks.

[BibT_eX]

[DOI]

CoRR, 2021

2020

Computation on Sparse Neural Networks: an Inspiration for Future Hardware.

[BibT_eX]

[DOI]

CoRR, 2020

A Unified DNN Weight Compression Framework Using Reweighted Optimization Methods.

[BibT_eX]

[DOI]

CoRR, 2020

MLPerf Inference Benchmark.

[BibT_eX]

[DOI]

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

INVITED: Computation on Sparse Neural Networks and its Implications for Future Hardware.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Learning in the Frequency Domain.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020

2019

Low-Power Computer Vision: Status, Challenges, and Opportunities.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

Low-Power Computer Vision: Status, Challenges, Opportunities.

[BibT_eX]

[DOI]

CoRR, 2019

Machine Learning at Facebook: Understanding Inference at the Edge.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

FBNet: Hardware-Aware Efficient ConvNet Design via Differentiable Neural Architecture Search.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2019

ChamNet: Towards Efficient Network Design Through Platform-Aware Model Adaptation.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2019

Special Session: 2018 Low-Power Image Recognition Challenge and Beyond.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019

2018

2018 Low-Power Image Recognition Challenge.

[BibT_eX]

[DOI]

CoRR, 2018

2012

Automatic generation of functional models for embedded processor extensions.

[BibT_eX]

[DOI]

Fei Sun

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2007

A Synthesis Methodology for Hybrid Custom Instruction and Coprocessor Generation for Extensible Processors.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2006

A Scalable Synthesis Methodology for Application-Specific Processors.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2006

Application-specific heterogeneous multiprocessor synthesis using extensible processors.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Hybrid Custom Instruction and Co-Processor Synthesis Methodology for Extensible Processors.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005

Synthesis of Application-Specific Heterogeneous Multiprocessor Architectures Using Extensible Processors.

[BibT_eX]

[DOI]

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

2004

Custom-instruction synthesis for extensible-processor platforms.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

2003

A Scalable Application-Specific Processor Synthesis Methodology.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002

Synthesis of custom processors based on extensible platforms.

[BibT_eX]

[DOI]

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Fei Sun

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