Youn-Sik Park

According to our database1, Youn-Sik Park authored at least 12 papers between 1993 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
A 7.5 Gb/s/pin 8-Gb LPDDR5 SDRAM With Various High-Speed and Low-Power Techniques.
IEEE J. Solid State Circuits, 2020

2019
A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking.
IEEE J. Solid State Circuits, 2019

A 7.5Gb/s/pin LPDDR5 SDRAM With WCK Clocking and Non-Target ODT for High Speed and With DVFS, Internal Data Copy, and Deep-Sleep Mode for Low Power.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
Dual-Loop Two-Step ZQ Calibration for Dynamic Voltage-Frequency Scaling in LPDDR4 SDRAM.
IEEE J. Solid State Circuits, 2018


2017


2015
Design, packaging, and architectural policy co-optimization for DC power integrity in 3D DRAM.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2008
PVT-invariant single-to-differential data converter with minimum skew and duty-ratio distortion.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

1996
Experimental evaluation of time-varying impulse shaping with a two-link flexible manipulator.
Robotica, 1996

1995
Vibration reduction in flexible systems using a time-varying impulse sequence.
Robotica, 1995

1993
Fourier-based optimal design of a flexible manipulator path to reduce residual vibration of the endpoint.
Robotica, 1993


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