Celia López-Ongil

Sensors, 2023

Personalised and Adjustable Interval Type-2 Fuzzy-Based PPG Quality Assessment for the Edge.

[BibT_eX]

[DOI]

Javier Andreu-Perez

Proceedings of the IEEE International Conference on Fuzzy Systems, 2023

Design Space Analysis for a Digital Lock-In Amplifier for Infrared Gas Sensor Signal Acquisition.

[BibT_eX]

[DOI]

Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

Ring Oscillator Circuits in Flexible aIGZO Technology for Biosignal Acquisition.

[BibT_eX]

[DOI]

Alba Páez-Montoro

Javier De Mena Pacheco

Marisa López-Vallejo

Susana Patón

Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022

Solar Energy Harvesting to Improve Capabilities of Wearable Devices.

[BibT_eX]

[DOI]

Alba Páez-Montoro

Emilio Olías-Ruíz

Sensors, 2022

Fear Detection in Multimodal Affective Computing: Physiological Signals versus Catecholamine Concentration.

[BibT_eX]

[DOI]

Clara Sainz de Baranda Andújar

Elena Romero-Perales

Manuel F. Canabal-Benito

Gema Esther Rodríguez-Ramos

Rafael Toro-Flores

Susana López-Ongil

Sensors, 2022

Bindi: Affective Internet of Things to Combat Gender-Based Violence.

[BibT_eX]

[DOI]

Esther Rituerto-González

Clara Luis-Mingueza

Carmen Peláez-Moreno

IEEE Internet Things J., 2022

Edge computing design space exploration for heart rate monitoring.

[BibT_eX]

[DOI]

Integr., 2022

WEMAC: Women and Emotion Multi-modal Affective Computing dataset.

[BibT_eX]

[DOI]

Esther Rituerto-González

Clara Luis-Mingueza

Carmen Peláez-Moreno

CoRR, 2022

Towards Interval Type-2 Fuzzy-Based PPG Quality Assessment for Physiological Monitoring.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Fuzzy Systems, 2022

Towards a Smart Earring for Continuous Heart Rate and Audio Monitoring.

[BibT_eX]

[DOI]

Alba Páez-Montoro

Juan Marcos-Torero

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

An Extreme Edge Low Power Device with Wavelet-based Compression for Physiological signals.

[BibT_eX]

[DOI]

M. J. Sánchez Naranjo

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

Low Power Consumption Online Testing Technique for Wearable Wireless Body Area Networks.

[BibT_eX]

[DOI]

Iñigo Mikel Lasaga Arana

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021

Fear Recognition for Women Using a Reduced Set of Physiological Signals.

[BibT_eX]

[DOI]

Sensors, 2021

2020

A Hybrid Data Fusion Architecture for BINDI: A Wearable Solution to Combat Gender-Based Violence.

[BibT_eX]

[DOI]

Esther Rituerto-González

Carmen Peláez-Moreno

Proceedings of the Multimedia Communications, Services and Security, 2020

System Dependability in Edge Computing Wearable Devices.

[BibT_eX]

[DOI]

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

A Design Space Exploration for Heart Rate Variability in a Wearable Smart Device.

[BibT_eX]

[DOI]

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

Electrodermal Activity Smart Sensor Integration in a Wearable Affective Computing System.

[BibT_eX]

[DOI]

A. I. Pérez Garcilópez

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019

Toward Fear Detection using Affect Recognition.

[BibT_eX]

[DOI]

Aranzazu Fernandez-Alvarez

Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019

Assessing SET Sensitivity of Mixed-Signal Circuits at Early Design Stages.

[BibT_eX]

[DOI]

Samuel Sordo Ibáñez

Servando Espejo-Meana

Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019

2018

Embedded Emotion Recognition within Cyber-Physical Systems using Physiological Signals.

[BibT_eX]

[DOI]

Rodrigo Marino

Teresa Riesgo

Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

2017

On-line testing of sensor networks: A case study.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

2014

A method to assess the robustness of cryptographic circuits at the design stage.

[BibT_eX]

[DOI]

M. Arévalo-Garbayo

Microelectron. J., 2014

Reducing SEU sensitivity in LIN networks: Selective and collaborative hardening techniques.

[BibT_eX]

[DOI]

A. Fabregat

Matteo Sonza Reorda

Proceedings of the 15th Latin American Test Workshop, 2014

Permanent faults on LIN networks: On-line test generation.

[BibT_eX]

[DOI]

Matteo Sonza Reorda

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Dependable reconfigurable space systems: Challenges, new trends and case studies.

[BibT_eX]

[DOI]

Pedro Reviriego Vasallo

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Effect of ionizing radiation on TRNGs for safe telecommunications: Robustness and randomness.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Fault injection and fault tolerance methodologies for assessing device robustness and mitigating against ionizing radiation.

[BibT_eX]

[DOI]

Dan Alexandrescu

Luca Sterpone

Proceedings of the 19th IEEE European Test Symposium, 2014

2012

Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection.

[BibT_eX]

[DOI]

Raúl Fernández Cardenal

Almudena Lindoso

IEEE Trans. Computers, 2012

On the use of embedded debug features for permanent and transient fault resilience in microprocessors.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2012

Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach.

[BibT_eX]

[DOI]

Almudena Lindoso

Letícia Maria Bolzani Poehls

N. Marroni

Bernardo Pianta

Fabian Vargas

J. Electron. Test., 2012

Logic masking for SET Mitigation Using Approximate Logic Circuits.

[BibT_eX]

[DOI]

Antonio Sanchez-Clemente

Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

SEU sensitivity of robust communication protocols.

[BibT_eX]

[DOI]

Joaquín Rivas-Abalo

Alberto Martín-Ortega

Javier Martinez-Oter

S. Rodriguez-Bustabad

Ignacio Arruego

Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

2011

Fault Injection in Modern Microprocessors Using On-Chip Debugging Infrastructures.

[BibT_eX]

[DOI]

IEEE Trans. Dependable Secur. Comput., 2011

Using an FPGA-based fault injection technique to evaluate software robustness under SEEs: A case study.

[BibT_eX]

[DOI]

Almudena Lindoso

Letícia Maria Bolzani Poehls

Bernardo Pianta

Fabian Vargas

Proceedings of the 12th Latin American Test Workshop, 2011

Accelerating secure circuit design with hardware implementation of Diehard Battery of tests of randomness.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Evaluation techniques for on-line testing of robust systems based on critical tasks distribution.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

2010

Robust cryptographic ciphers with on-line statistical properties validation.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

An on-line fault detection technique based on embedded debug features.

[BibT_eX]

[DOI]

Michelangelo Grosso

Matteo Sonza Reorda

Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

2009

SET Emulation Under a Quantized Delay Model.

[BibT_eX]

[DOI]

Raúl Fernández Cardenal

J. Electron. Test., 2009

Study of SEU effects in a Turbo Decoder Bit Error Rate.

[BibT_eX]

[DOI]

Proceedings of the 10th Latin American Test Workshop, 2009

Briefing power/reliability optimization in embedded software design.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

Pseudo-random number generation applied to robust modern cryptography: A new technique for block ciphers.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

In-depth analysis of digital circuits against soft errors for selective hardening.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

2008

Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

2007

A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

2006

A Fault Injection Environment for SoPC's Embedded Microprocessors.

[BibT_eX]

Proceedings of the 7th Latin American Test Workshop, 2006

Emulation-based Fault Injection in Circuits with Embedded Memories.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

Fault Injection-based Reliability Evaluation of SoPCs.

[BibT_eX]

[DOI]

Proceedings of the 11th European Test Symposium, 2006

An Extension of Transient Fault Emulation Techniques to Circuits with Embedded Memories.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005

Autonomous Transient Fault Emulation on FPGAs for Accelerating Fault Grading.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

Correlation-Based Fingerprint Matching Using FPGAs.

[BibT_eX]

Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

An Autonomous FPGA-based Emulation System for Fast Fault Tolerant Evaluation.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Techniques for Fast Transient Fault Grading Based on Autonomous Emulation.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

2004

Transient Fault Emulation of Hardened Circuits in FPGA Platforms.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

A jitter insensitive continuous-time ΣΔ modulator using transmission lines.

[BibT_eX]

[DOI]

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

FPGA Implementation of Biometric Authentication System Based on Hand Geometry.

[BibT_eX]

[DOI]

Proceedings of the Field Programmable Logic and Application, 2004

2003

Theoretical comparison between sequential redundancy addition and removal and retiming optimization techniques.

[BibT_eX]

[DOI]

J. Syst. Archit., 2003

2002

An Industrial Environment for High-Level Fault-Tolerant Structures Insertion and Validation.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

Analysis of the Equivalences and Dominances of Transient Faults at the RT Level.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

New Techniques for Speeding-Up Fault-Injection Campaigns.

[BibT_eX]

[DOI]

Proceedings of the 2002 Design, 2002

2001

Logic Optimization of Unidirectional Circuits with Structural Methods.

[BibT_eX]

[DOI]

Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

Automatic Insertion of Fault-Tolerant Structures at the RT Level.

[BibT_eX]

[DOI]