Antonis M. Paschalis

According to our database, Antonis M. Paschalis authored at least 97 papers between 1986 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2022

Efficient Hardware Architectures and Implementations of Packet-Level Erasure Coding Schemes for High Data Rate Reliable Satellite Communications.

Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis, Elias Machairas, Antonios Paschalis

IEEE Trans. Aerosp. Electron. Syst., 2022

An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology.

Panagiotis Chatziantoniou, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis

IEEE Trans. Aerosp. Electron. Syst., 2022

High-Performance Hardware Accelerators for Next Generation On-Board Data Processing.

Antonis M. Paschalis, Panagiotis Chatziantoniou, Dimitris Theodoropoulos, Antonis Tsigkanos, Nektarios Kranitis

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

2021

A 3.3 Gbps CCSDS 123.0-B-1 Multispectral & Hyperspectral Image Compression Hardware Accelerator on a Space-Grade SRAM FPGA.

Antonis Tsigkanos, Nektarios Kranitis, George Theodorou, Antonis M. Paschalis

IEEE Trans. Emerg. Top. Comput., 2021

2020

High-Performance COTS FPGA SoC for Parallel Hyperspectral Image Compression With CCSDS-123.0-B-1.

Antonis Tsigkanos, Nektarios Kranitis, Dimitris Theodoropoulos, Antonis M. Paschalis

IEEE Trans. Very Large Scale Integr. Syst., 2020

Efficient Architectures for Multigigabit CCSDS LDPC Encoders.

Dimitris Theodoropoulos, Nektarios Kranitis, Antonis Tsigkanos, Antonis M. Paschalis

IEEE Trans. Very Large Scale Integr. Syst., 2020

Efficient LDPC Encoder Designs for Magnetic Recording Media.

Dimitris Theodoropoulos, Nektarios Kranitis, Antonis Tsigkanos, Antonis M. Paschalis

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

2019

Analyzing the Resilience to SEUs of an Image Data Compression Core in a COTS SRAM FPGA.

Ioannis Tsounis, Antonis Tsigkanos, Vasileios Vlagkoulis, Mihalis Psarakis, Nektarios Kranitis, Antonis M. Paschalis

Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2019

2016

An efficient LDPC encoder architecture for space applications.

Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

2015

Dependable Multicore Architectures at Nanoscale: The View From Europe.

Marco Ottavi, Salvatore Pontarelli, Dimitris Gizopoulos, Cristiana Bolchini, Maria K. Michael, Lorena Anghel, Mehdi Baradaran Tahoori, Antonis M. Paschalis, Pedro Reviriego, Oliver Bringmann, Viacheslav Izosimov, Hans A. R. Manhaeve, Christos Strydis, Said Hamdioui

IEEE Des. Test, 2015

A single chip dependable and adaptable payload Data Processing Unit.

Nektarios Kranitis, Antonis Tsigkanos, George Theodorou, Ioannis Sideris, Antonis M. Paschalis

Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

2014

Software-Based Self-Test for Small Caches in Microprocessors.

Georgios Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Power-aware optimization of software-based self-test for L1 caches in microprocessors.

George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Dependable reconfigurable space systems: Challenges, new trends and case studies.

Antonis M. Paschalis, Harald Michalik, Nektarios Kranitis, Celia López-Ongil, Pedro Reviriego Vasallo

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

2013

Software-Based Self Test Methodology for On-Line Testing of L1 Caches in Multithreaded Multicore Architectures.

Giorgos Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

IEEE Trans. Very Large Scale Integr. Syst., 2013

Special session 4B: Elevator talks.

Jennifer Dworak, Ronald Shawn Blanton, Masahiro Fujita, Kazumi Hatayama, Naghmeh Karimi, Michail Maniatakos, Antonis M. Paschalis, Adit D. Singh, Tian Xia

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Online error detection in multiprocessor chips: A test scheduling study.

Manolis Kaliorakis, Nikos Foutris, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2012

Accumulator Based 3-Weight Pattern Generation.

Antonis M. Paschalis, Ioannis Voyiatzis, Dimitris Gizopoulos

IEEE Trans. Very Large Scale Integr. Syst., 2012

Low Energy Online Self-Test of Embedded Processors in Dependable WSN Nodes.

Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

IEEE Trans. Dependable Secur. Comput., 2012

A Software-Based Self-Test methodology for on-line testing of data TLBs.

George Theodorou, Serafeim Chatzopoulos, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

Proceedings of the 17th IEEE European Test Symposium, 2012

2011

A Software-Based Self-Test methodology for on-line testing of processor caches.

George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

Proceedings of the 2011 IEEE International Test Conference, 2011

2010

Recursive Pseudo-Exhaustive Two-Pattern Generation.

Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis

IEEE Trans. Very Large Scale Integr. Syst., 2010

A software-based self-test methodology for in-system testing of processor cache tag arrays.

George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

SBST for on-line detection of hard faults in multiprocessor applications under energy constraints.

Andreas Merentitis, Dionisis Margaris, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

Energy optimal on-line Self-Test of microprocessors in WSN nodes.

Andreas Merentitis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis

Proceedings of the 28th International Conference on Computer Design, 2010

2009

Instruction-Based Online Periodic Self-Testing of Microprocessors with Floating-Point Units.

George Xenoulis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

IEEE Trans. Dependable Secur. Comput., 2009

Software-Based Self-Testing of Symmetric Shared-Memory Multiprocessors.

Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

IEEE Trans. Computers, 2009

An Input Vector Monitoring Concurrent BIST scheme exploiting .

Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

Exploiting Thread-Level Parallelism in Functional Self-Testing of CMT Processors.

Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Ishwar Parulkar

Proceedings of the 14th IEEE European Test Symposium, 2009

2008

Systematic Software-Based Self-Test for Pipelined Processors.

Dimitris Gizopoulos, Mihalis Psarakis, Miltiadis Hatzimihail, Michail Maniatakos, Antonis M. Paschalis, Anand Raghunathan, Srivaths Ravi

IEEE Trans. Very Large Scale Integr. Syst., 2008

An Input Vector Monitoring Concurrent BIST Architecture Based on a Precomputed Test Set.

Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Constantin Halatsis, Frosso S. Makri, Miltiadis Hatzimihail

IEEE Trans. Computers, 2008

Hybrid-SBST Methodology for Efficient Testing of Processor Cores.

Nektarios Kranitis, Andreas Merentitis, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos

IEEE Des. Test Comput., 2008

Low Energy On-Line SBST of Embedded Processors.

Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

Proceedings of the 2008 IEEE International Test Conference, 2008

Functional Self-Testing for Bus-Based Symmetric Multiprocessors.

Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

Proceedings of the Design, Automation and Test in Europe, 2008

2007

Functional Processor-Based Testing of Communication Peripherals in Systems-on-Chip.

Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

IEEE Trans. Very Large Scale Integr. Syst., 2007

A methodology for detecting performance faults in microprocessors via performance monitoring hardware.

Miltiadis Hatzimihail, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 2007 IEEE International Test Conference, 2007

A Functional Self-Test Approach for Peripheral Cores in Processor-Based SoCs.

Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

Selecting Power-Optimal SBST Routines for On-Line Processor Testing.

Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos

Proceedings of the 12th European Test Symposium, 2007

On-Line Periodic Self-Testing of High-Speed Floating-Point Units in Microprocessors.

George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2006

Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units.

George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

IEEE Trans. Computers, 2006

A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs.

P. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

Optimal periodic testing of intermittent faults in embedded pipelined processor applications.

Nektarios Kranitis, Andreas Merentitis, Nikolaos Laoutaris, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos, Constantin Halatsis

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Systematic software-based self-test for pipelined processors.

Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis Hatzimihail, Antonis M. Paschalis, Anand Raghunathan, Srivaths Ravi

Proceedings of the 43rd Design Automation Conference, 2006

2005

Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time.

Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis

IEEE Trans. Very Large Scale Integr. Syst., 2005

A concurrent built-in self-test architecture based on a self-testing RAM.

Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Constantin Halatsis

IEEE Trans. Reliab., 2005

Built-in sequential fault self-testing of array multipliers.

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Effective software-based self-test strategies for on-line periodic testing of embedded processors.

Antonis M. Paschalis, Dimitris Gizopoulos

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Software-Based Self-Testing of Embedded Processors.

Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, George Xenoulis

IEEE Trans. Computers, 2005

A concurrent BIST scheme for on-line/off-line testing based on a pre-computed test set.

Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis, Constantin Halatsis

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Test Generation Methodology for High-Speed Floating Point Adders.

George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

Accumulator-Based Weighted Pattern Generation.

Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

Software-Based Self-Test for Pipelined Processors: A Case Study.

Miltiadis Hatzimihail, Mihalis Psarakis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

2003

Instruction-Based Self-Testing of Processor Cores.

Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian

J. Electron. Test., 2003

Easily Testable Cellular Carry Lookahead Adders.

Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian

J. Electron. Test., 2003

Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores.

Nektarios Kranitis, George Xenoulis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Low-Cost, On-Line Software-Based Self-Testing of Embedded Processor Cores.

George Xenoulis, Dimitris Gizopoulos, Nektarios Kranitis, Antonis M. Paschalis

Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

Low-Cost Software-Based Self-Testing of RISC Processor Cores.

Nektarios Kranitis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 2003 Design, 2003

2002

Effective Software Self-Test Methodology for Processor Cores.

Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian

Proceedings of the 2002 Design, 2002

2001

An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths.

Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis, Yervant Zorian

J. Electron. Test., 2001

Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers.

Mihalis Psarakis, Antonis M. Paschalis, Nektarios Kranitis, Dimitris Gizopoulos, Yervant Zorian

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Deterministic software-based self-testing of embedded processor cores.

Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Yervant Zorian

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays.

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

IEEE Trans. Computers, 2000

Power-/Energy Efficient BIST Schemes for Processor Data Paths.

Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Mihalis Psarakis, Yervant Zorian

IEEE Des. Test Comput., 2000

Low Power/Energy BIST Scheme for Datapaths.

Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Deterministic Built-In Self -Test for Shifters, Adders and ALUs in Datapaths.

Mihalis Psarakis, Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 1st Latin American Test Workshop, 2000

Effective Low Power BIST for Datapaths.

Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 2000 Design, 2000

1999

An Effective Built-In Self-Test Scheme for Parallel Multipliers.

Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

IEEE Trans. Computers, 1999

An Accumulator-Based BIST Approach for Two-Pattern Testing.

Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantin Halatsis

J. Electron. Test., 1999

An Effective BIST Architecture for Sequential Fault Testing in Array Multipliers.

Mihalis Psarakis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

An Effective BIST Architecture for Fast Multiplier Cores.

Antonis M. Paschalis, Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Yervant Zorian

Proceedings of the 1999 Design, 1999

1998

Test Generation and Fault Simulation for Cell Fault Model using Stuck-at Fault Model based Test Tools.

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

J. Electron. Test., 1998

A Totally Self-Checking 1-out-of-3 Code Error Indicator.

Antonis M. Paschalis, Nikolaos Gaitanis, Dimitris Gizopoulos, Panagiotis Kostarakis

J. Electron. Test., 1998

Concurrent Delay Testing in Totally Self-Checking Systems.

Antonis M. Paschalis, Dimitris Gizopoulos, Nikolaos Gaitanis

J. Electron. Test., 1998

Effective Built-In Self-Test for Booth Multipliers.

Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

IEEE Des. Test Comput., 1998

Robustly Testable Array Multipliers under Realistic Sequential Cell Fault Model.

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

R-CBIST: an effective RAM-based input vector monitoring concurrent BIST technique.

Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantinos Halatsis

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1997

Robust Sequential Fault Testing of Iterative Logic Arrays.

Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

An Effective BIST Scheme for Arithmetic Logic Units.

Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian, Mihalis Psarakis

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1996

Testing CMOS combinational iterative logic arrays for realistic faults.

Dimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis

Integr., 1996

An efficient built-in self test method for robust path delay fault testing.

Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantin Halatsis

J. Electron. Test., 1996

<i>C</i>-Testable modified-Booth multipliers.

Dimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis, Constantin Halatsis

J. Electron. Test., 1996

An asynchronous totally self-checking two-rail code error indicator.

Nikolaos Gaitanis, Dimitris Gizopoulos, Antonis M. Paschalis, Panagiotis Kostarakis

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

An Effective BIST Scheme for Datapaths.

Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995

Efficient Totally Self-Checking Checkers for a Class of Borden Codes.

Th. Haniotakis, Antonis M. Paschalis, Dimitris Nikolos

IEEE Trans. Computers, 1995

On TSC Checkers for m-out-n Codes.

Vassilios V. Dimakopoulos, G. Sourtziotis, Antonis M. Paschalis, Dimitris Nikolos

IEEE Trans. Computers, 1995

Testing combinational iterative logic arrays for realistic faults.

Dimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

An Effective BIST Scheme for Booth Multipliers.

Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

Accumulator-based BIST approach for stuck-open and delay fault testing.

Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantin Halatsis

Proceedings of the 1995 European Design and Test Conference, 1995

An efficient comparative concurrent Built-In Self-Test technique.

Ioannis Voyiatzis, Dimitris Nikolos, Antonis M. Paschalis, Constantinos Halatsis, Th. Haniotakis

Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

An effective BIST scheme for carry-save and carry-propagate array multipliers.

Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

Totally Self Checking reconfigurable duplication system with separate internal fault indication.

Nikolaos Gaitanis, Panagiotis Kostarakis, Antonis M. Paschalis

Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1992

A conformance test system for DECT physical layer.

A. C. Papavramidis, Antonis M. Paschalis, O. Myrtue, Kostas Dangakis, George S. Tombras, Panos Kostarakis

Proceedings of the Third IEEE International Symposium on Personal, 1992

Development of a conformance test system for ERMES receivers.

Kostas Dangakis, George S. Tombras, Antonis M. Paschalis, A. C. Papavramidis, Panos Kostarakis

Proceedings of the Third IEEE International Symposium on Personal, 1992

1990

An Efficient TSC 1-out-of-3 Code Checker.

Antonis M. Paschalis, Costas Efstathiou, Constantine Halatsis

IEEE Trans. Computers, 1990

1988

Efficient Modular Design of TSC Checkers for <i>M</i>-out-of-2<i>M</i> Codes.

Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis

IEEE Trans. Computers, 1988

Efficient Design of Totally Self-Checking Checkers for all Low-Cost Arithmetic Codes.

Dimitris Nikolos, Antonis M. Paschalis, George Philokyprou

IEEE Trans. Computers, 1988

1986

Efficient Modular Design of TSC Checkers for M-out-of-2M Codes.

Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis

Proceedings of the VLSI Algorithms and Architectures, 1986