Claude Chappert

Zhaohao Wang

ACM J. Emerg. Technol. Comput. Syst., 2015

Yield and Reliability Improvement Techniques for Emerging Nonvolatile STT-MRAM.

[BibT_eX]

[DOI]

Wang Kang

Liuyang Zhang

Youguang Zhang

IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

2014

Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2014

Ferroelectric tunnel memristor-based neuromorphic network with 1T1R crossbar architecture.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Joint Conference on Neural Networks, 2014

Spintronics for low-power computing.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

An overview of spin-based integrated circuits.

[BibT_eX]

[DOI]

Wang Kang

Zhaohao Wang

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

Magnetic Adder Based on Racetrack Memory.

[BibT_eX]

[DOI]

Hong-Phuc Trinh

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A low-cost built-in error correction circuit design for STT-MRAM reliability improvement.

[BibT_eX]

[DOI]

Youguang Zhang

Microelectron. Reliab., 2013

Spin-electronics based logic fabrics.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Emerging hybrid logic circuits based on non-volatile magnetic memories.

[BibT_eX]

[DOI]

Guillaume Prenat

Bernard Dieny

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Synchronous full-adder based on complementary resistive switching memory cells.

[BibT_eX]

[DOI]

Erya Deng

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Low power magnetic flip-flop based on checkpointing and self-enable mechanism.

[BibT_eX]

[DOI]

Djaafar Chabi

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Analytical study of complementary memristive synchronous logic gates.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

2012

Failure and reliability analysis of STT-MRAM.

[BibT_eX]

[DOI]

Thibaut Devolder

Microelectron. Reliab., 2012

Cross-point architecture for spin transfer torque magnetic random access memory

[BibT_eX]

[DOI]

Sumanta Chaudhuri

Celso Accoto

CoRR, 2012

Crossbar architecture based on 2R complementary resistive switching memory cell.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Nanodevice-based novel computing paradigms and the neuromorphic approach.

[BibT_eX]

[DOI]

Damien Querlioz

Djaafar Chabi

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

MRAM crossbar based configurable logic block.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Design considerations and strategies for high-reliable STT-MRAM.

[BibT_eX]

[DOI]

Thibaut Devolder

Microelectron. Reliab., 2011

Embedded MRAM for high-speed computing.

[BibT_eX]

[DOI]

Luis Vitório Cargnini

Raphael Martins Brum

Yoann Guillemenet

Gilles Sassatelli

Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

High Performance SoC Design Using Magnetic Logic and Memory.

[BibT_eX]

[DOI]

Lionel Torres

Luis Vitório Cargnini

Daniel Etiemble

Proceedings of the VLSI-SoC: Advanced Research for Systems on Chip, 2011

Design of MRAM based logic circuits and its applications.

[BibT_eX]

[DOI]

Lionel Torres

Yoann Guillemenet

Luis Vitório Cargnini

Gilles Sassatelli

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

Magnetic Look-Up Table (MLUT) Featuring Radiation Hardness, High Performance and Low Power.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

2010

Design of embedded MRAM macros for memory-in-logic applications.

[BibT_eX]

[DOI]

Sumanta Chaudhuri

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

High Density Asynchronous LUT Based on Non-volatile MRAM Technology.

[BibT_eX]

[DOI]

Sumanta Chaudhuri

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009

TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2009

Spin transfer torque (STT)-MRAM-based runtime reconfiguration FPGA circuit.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2009

2008

Spintronic Device Based Non-volatile Low Standby Power SRAM.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

Injection locked CMOS buffer dedicated to nanomagnetic based voltage controlled oscillator.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

Synthesis of Finite State Machines with Magnetic Domain Wall Logic.

[BibT_eX]

[DOI]