Chun C. Lee

According to our database, Chun C. Lee authored at least 11 papers between 2011 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A VTC/TDC-Assisted 4× Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC With 13 GHz ERBW.

Amy Whitcombe, Chun C. Lee, Asma Kuriparambil Thekkumpate, Somnath Kundu, Jaykant Timbadiya, Abhishek Agrawal, Brent R. Carlton, Peter Sagazio, Stefano Pellerano, Christopher D. Hull

IEEE J. Solid State Circuits, 2023

2022

A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET.

Steven Callender, Abhishek Agrawal, Amy Whitcombe, Ritesh Bhat, Mustafijur Rahman, Chun C. Lee, Peter Sagazio, Georgios C. Dogiamis, Brent R. Carlton, Christopher D. Hull, Stefano Pellerano

IEEE J. Solid State Circuits, 2022

A 6.0mW 3.8GS/s 7b VTC/TDC-Assisted Interleaved SAR ADC with 13GHz ERBW.

Amy Whitcombe, Chun C. Lee, Asma Kuriparambil Thekkumpate, Somnath Kundu, Jaykant Timbadiya, Abhishek Agrawal, Brent R. Carlton, Peter Sagazio, Stefano Pellerano, Christopher D. Hull

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A Fully Integrated 160Gb/s D-Band Transmitter with 1.1 pJ/b Efficiency in 22nm FinFET Technology.

Steven Callender, Amy Whitcombe, Abhishek Agrawal, Ritesh Bhat, Mustafijur Rahman, Chun C. Lee, Peter Sagazio, Georgios C. Dogiamis, Brent R. Carlton, Mark Chakravorti, Stefano Pellerano, Christopher D. Hull

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

A 12MHz/38.4MHz Fast Start-Up Crystal Oscillator using Impedance Guided Chirp Injection in 22nm FinFET CMOS.

Hao Luo, Somnath Kundu, Chun C. Lee, Rinkle Jain, Sarah Shahraini, Eduardo Alban, Timo Huusari, Jason Mix, Nasser A. Kurd, Mohamed Abdel-moneum, Brent R. Carlton

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2015

A 12b 70MS/s SAR ADC with digital startup calibration in 14nm CMOS.

Chun C. Lee, Cho-Ying Lu, Ramya Narayanaswamy, Jad B. Rizk

Proceedings of the Symposium on VLSI Circuits, 2015

2013

A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.

Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2013

2012

A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS.

Yulin Tan, Jon Duster, Chang-Tsung Fu, Erkan Alpman, Ajay Balankutty, Chun C. Lee, Ashoke Ravi, Stefano Pellerano, Kailash Chandrashekar, Hyung Seok Kim, Brent R. Carlton, Satoshi Suzuki, M. Shafi, Yorgos Palaskas, Hasnain Lakdawala

Proceedings of the Symposium on VLSI Circuits, 2012

32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver.

Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Durgesh Srivastava, Satish Venkatesan, Hyung-Jin Lee, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Krishnamurthy Soumyanath, Sunder Ramamurthy

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011

A 14 b 23 MS/s 48 mW Resetting Sigma Delta ADC.

Chun C. Lee, Michael P. Flynn

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A SAR-Assisted Two-Stage Pipeline ADC.

Chun C. Lee, Michael P. Flynn

IEEE J. Solid State Circuits, 2011