Krishnamurthy Soumyanath

According to our database, Krishnamurthy Soumyanath authored at least 41 papers between 1999 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.

Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2013

2012

A reconfigurable distributed all-digital clock generator core with SSC and skew correction in 22nm high-k tri-gate LP CMOS.

Y. William Li, Carlos Ornelas, Hyung Seok Kim, Hasnain Lakdawala, Ashoke Ravi, Krishnamurthy Soumyanath

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver.

Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Durgesh Srivastava, Satish Venkatesan, Hyung-Jin Lee, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Krishnamurthy Soumyanath, Sunder Ramamurthy

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011

A Flip-Chip-Packaged 25.3 dBm Class-D Outphasing Power Amplifier in 32 nm CMOS for WLAN Application.

Hongtao Xu, Yorgos Palaskas, Ashoke Ravi, Masoud Sajadieh, Mohammed A. El-Tanani, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2011

A 2.5GHz 32nm 0.35mm² 3.5dB NF -5dBm P1dB fully differential CMOS push-pull LNA with integrated 34dBm T/R switch and ESD protection.

Chang-Tsung Fu, Hasnain Lakdawala, Stewart S. Taylor, Krishnamurthy Soumyanath

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

A highly linear 25dBm outphasing power amplifier in 32nm CMOS for WLAN application.

Hongtao Xu, Yorgos Palaskas, Ashoke Ravi, Krishnamurthy Soumyanath

Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009

A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS.

Jeffrey S. Walling, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot

IEEE J. Solid State Circuits, 2009

A 1.05 V 1.6 mW, 0.45°C 3σ Resolution ΣΔ Based Temperature Sensor With Parasitic Resistance Compensation in 32 nm Digital CMOS Process.

Hasnain Lakdawala, Y. William Li, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2009

A 1.05V 1.6mW 0.45°C 3σ-resolution ΔΣ-based temperature sensor with parasitic-resistance compensation in 32nm CMOS.

Y. William Li, Hasnain Lakdawala, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A 1.1V 50mW 2.5GS/s 7b Time-Interleaved C-2C SAR ADC in 45nm LP digital CMOS.

Erkan Alpman, Hasnain Lakdawala, L. Richard Carley, Krishnamurthy Soumyanath

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS.

Tawfiq Musah, Sunwoo Kwon, Hasnain Lakdawala, Krishnamurthy Soumyanath, Un-Ku Moon

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

Desensitized CMOS Low-Noise Amplifiers.

Gaurab Banerjee, Krishnamurthy Soumyanath, David J. Allstot

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A 64 GHz LNA With 15.5 dB Gain and 6.5 dB NF in 90 nm CMOS.

Stefano Pellerano, Yorgos Palaskas, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2008

A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation.

Jeffrey S. Walling, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 28mW Spectrum-Sensing Reconfigurable 20MHz 72dB-SNR 70dB-SNDR DT ΔΣ ADC for 802.11n/WiMAX Receivers.

Pukar Malla, Hasnain Lakdawala, Kevin T. Kornegay, Krishnamurthy Soumyanath

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 3.6GHz, 16mW ΣΔ DAC for a 802.11n / 802.16e transmitter with 30dB digital power control in 90nm CMOS.

Parmoon Seddighrad, Ashoke Ravi, Masoud Sajadieh, Hasnain Lakdawala, Krishnamurthy Soumyanath

Proceedings of the ESSCIRC 2008, 2008

A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolution.

Hiroyuki Ito, Hasnain Lakdawala, Ashoke Ravi, Stefano Pellerano, Rick Ruby, Krishnamurthy Soumyanath, Kazuya Masu

Proceedings of the ESSCIRC 2008, 2008

2007

A 64GHz 6.5 dB NF 15.5 dB gain LNA in 90nm CMOS.

Stefano Pellerano, Yorgos Palaskas, Krishnamurthy Soumyanath

Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006

A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process.

Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2006

A 5-GHz 108-Mb/s 2 $\times$2 MIMO Transceiver RFIC With Fully Integrated 20.5-dBm ${\rm P}_{\rm 1dB}$ Power Amplifiers in 90-nm CMOS.

Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano, Brent R. Carlton, Mostafa A. Elmala, Ralph E. Bishop, Gaurab Banerjee, Rich B. Nicholls, Stanley K. Ling, Nati Dinur, Stewart S. Taylor, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2006

A 90-nm CMOS Doherty power amplifier with minimum AM-PM distortion.

Mostafa Elmala, Jeyanandh Paramesh, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2006

A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS.

Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano, Brent R. Carlton, Mostafa A. Elmala, Ralph E. Bishop, Gaurab Banerjee, Rich B. Nicholls, Stanley K. Ling, Stewart S. Taylor, Krishnamurthy Soumyanath

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A four-antenna receiver in 90-nm CMOS for beamforming and spatial diversity.

Jeyanandh Paramesh, Ralph Bishop, Krishnamurthy Soumyanath, David J. Allstot

IEEE J. Solid State Circuits, 2005

A 9-b 400 Msample/s pipelined analog-to digital converter in 90nm CMOS.

Charles T. Peach, Ashoke Ravi, Rosie Bishop, Krishnamurthy Soumyanath, David J. Allstot

Proceedings of the 31st European Solid-State Circuits Conference, 2005

A 5 GHz class-AB power amplifier in 90 nm CMOS with digitally-assisted AM-PM correction.

Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

A 90-nm MOS-only 3-11GHz transmitter for UWB.

Yorgos Palaskas, Ralph E. Bishop, Ashoke Ravi, Krishnamurthy Soumyanath

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

Measurements and analysis of SER-tolerant latch in a 90-nm dual-V_T CMOS process.

Peter Hazucha, Tanay Karnik, Steven Walstra, Bradley A. Bloechel, James W. Tschanz, Jose Maiz, Krishnamurthy Soumyanath, Gregory E. Dermer, Siva G. Narendra, Vivek De, Shekhar Borkar

IEEE J. Solid State Circuits, 2004

Desensitized design of MOS low noise amplifiers by R_n minimization.

Gaurab Banerjee, David T. Becher, Celia Hung, Krishnamurthy Soumyanath, David J. Allstot

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

8 GHz, 20mW, fast locking, fractional-N frequency synthesizer with optimized 3^rd order, 3/5-bit IIR and 3^rd order 3-bit-FIR noise shapers in 90nm CMOS.

Ashoke Ravi, Ralph E. Bishop, L. Richard Carley, Krishnamurthy Soumyanath

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

Measurement and modeling of noise parameters for desensitized low noise amplifiers.

Gaurab Banerjee, David T. Becher, Celia Hung, David J. Allstot, Krishnamurthy Soumyanath

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

17GHz and 24GHz LNA designs based on extended-S-parameter with microstrip-on-die in 0.18μm logic CMOS technology.

Luiz M. Franca-Neto, Bradley A. Bloechel, Krishnamurthy Soumyanath

Proceedings of the ESSCIRC 2003, 2003

Measurements and analysis of SER tolerant latch in a 90 nm dual-Vt CMOS process.

Peter Hazucha, Tanay Kamik, Steven Walstra, Bradley A. Bloechel, James W. Tschanz, Jose Maiz, Krishnamurthy Soumyanath, Greg Dermer, Siva G. Narendra, Vivek De, Shekhar Borkar

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

5-GHz 32-bit integer execution core in 130-nm dual-V_T CMOS.

Sriram R. Vangal, Mark A. Anders, Nitin Borkar, Erik Seligman, Venkatesh Govindarajulu, Vasantha Erraguntla, Howard Wilson, Amaresh Pangal, Venkat Veeramachaneni, James W. Tschanz, Yibin Ye, Dinesh Somasekhar, Bradley A. Bloechel, Gregory E. Dermer, Ram K. Krishnamurthy, Krishnamurthy Soumyanath, Sanu Mathew, Siva G. Narendra, Mircea R. Stan, Scott Thompson, Vivek De, Shekhar Borkar

IEEE J. Solid State Circuits, 2002

A 130-nm 6-GHz 256 × 32 bit leakage-tolerant register file.

Ram K. Krishnamurthy, Atila Alvandpour, Ganesh Balamurugan, Naresh R. Shanbhag, Krishnamurthy Soumyanath, Shekhar Y. Borkar

IEEE J. Solid State Circuits, 2002

A sub-130-nm conditional keeper technique.

Atila Alvandpour, Ram K. Krishnamurthy, Krishnamurthy Soumyanath, Shekhar Y. Borkar

IEEE J. Solid State Circuits, 2002

2001

Sub-500-ps 64-b ALUs in 0.18-μm SOI/bulk CMOS: design and scaling trends.

Sanu K. Mathew, Ram K. Krishnamurthy, Mark A. Anders, Rafael Rios, Kaizad R. Mistry, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2001

A low-leakage dynamic multi-ported register file in 0.13mm CMOS.

Atila Alvandpour, Ram Krishnamurthy, Krishnamurthy Soumyanath, Shekhar Borkar

Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

Leakage control and tolerance challenges for sub-0.1µm microprocessor circuits.

Ram Krishnamurthy, Mark A. Anders, Krishnamurthy Soumyanath, Shekhar Borkar

Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

2000

Multiple-parameter CMOS IC testing with increased sensitivity for I_DDQ.

Ali Keshavarzi, Kaushik Roy, Charles F. Hawkins, Manoj Sachdev, Krishnamurthy Soumyanath, Vivek De

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Reliable low-power design in the presence of deep submicron noise (embedded tutorial session).

Naresh R. Shanbhag, Krishnamurthy Soumyanath, Samuel Martin

Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

1999

Accurate on-chip interconnect evaluation: a time-domain technique.

Krishnamurthy Soumyanath, Shekhar Borkar, Chunyan Zhou, Bradley A. Bloechel

IEEE J. Solid State Circuits, 1999