Doosub Lee

According to our database¹, Doosub Lee authored at least 6 papers between 2014 and 2017.

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2017

256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2017

2016

A 128 Gb 3b/cell V-NAND Flash Memory With 1 Gb/s I/O Rate.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2016

7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2015

7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

19.5 Three-dimensional 128Gb MLC vertical NAND Flash-memory with 24-WL stacked layers and 50MB/s high-speed programming.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014