Jin-Yup Lee

According to our database, Jin-Yup Lee authored at least 2 papers between 2017 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

A 1.8 Gb/s/pin 16Tb NAND Flash Memory Multi-Chip Package with F-Chip of Toggle 4.0 Specification for High Performance and High Capacity Storage Systems.

Jang-Woo Lee, Dae-Hoon Na, Anil Kavala, Hwasuk Cho, Junha Lee, Manjae Yang, Eunjin Song, Tongsung Kim, Seon-Kyoo Lee, Dong-Su Jang, Byung-Kwan Chun, Youngmin Jo, Sunwon Jung, Doo-Il Jung, Chan-ho Kim, Daewoon Kang, Tae-Sung Lee, Byunghoon Jeong, Chiweon Yoon, Dongku Kang, Seungjae Lee, Jungdon Ihm, Dae-Seok Byeon, Jin-Yup Lee, Sangjoon Hwang, Jai Hyuk Song

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2017

256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers.

Dongku Kang, Woopyo Jeong, Chulbum Kim, Doo-Hyun Kim, Yong-Sung Cho, Kyung-Tae Kang, Jinho Ryu, Kyung-Min Kang, Sungyeon Lee, Wandong Kim, Hanjun Lee, Jaedoeg Yu, Nayoung Choi, Dong-Su Jang, Cheon An Lee, Young-Sun Min, Moosung Kim, Ansoo Park, Jae-Ick Son, In-Mo Kim, Pansuk Kwak, Bong-Kil Jung, Doosub Lee, Hyunggon Kim, Jeong-Don Ihm, Dae-Seok Byeon, Jin-Yup Lee, Ki-Tae Park, Kyehyun Kyung

IEEE J. Solid State Circuits, 2017