Yang-Lo Ahn

According to our database1, Yang-Lo Ahn authored at least 6 papers between 2012 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory.
IEEE J. Solid State Circuits, 2018

2017

2016

2015
Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming.
IEEE J. Solid State Circuits, 2015

2014

2012
A new 3-bit programming algorithm using SLC-to-TLC migration for 8MB/s high performance TLC NAND flash memory.
Proceedings of the Symposium on VLSI Circuits, 2012


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