Alireza Ejlali
Orcid: 0000-0002-5661-3629Affiliations:
- Sharif University of Technology, Tehran, Iran
According to our database1,
Alireza Ejlali
authored at least 111 papers
between 2002 and 2024.
Collaborative distances:
Collaborative distances:
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Online presence:
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on orcid.org
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on sharif.edu
On csauthors.net:
Bibliography
2024
A Comprehensive Survey of Convolutions in Deep Learning: Applications, Challenges, and Future Trends.
IEEE Access, 2024
2023
Passive Primary/Backup-Based Scheduling for Simultaneous Power and Reliability Management on Heterogeneous Embedded Systems.
IEEE Trans. Sustain. Comput., 2023
Power-Efficient and Aging-Aware Primary/Backup Technique for Heterogeneous Embedded Systems.
IEEE Trans. Sustain. Comput., 2023
ReLIEF: A Reinforcement-Learning-Based Real-Time Task Assignment Strategy in Emerging Fault-Tolerant Fog Computing.
IEEE Internet Things J., 2023
Proceedings of the 29th IEEE Real-Time and Embedded Technology and Applications Symposium, 2023
2022
MASTER: Reclamation of Hybrid Scratchpad Memory to Maximize Energy Saving in Multi-Core Edge Systems.
IEEE Trans. Sustain. Comput., 2022
IEEE Trans. Parallel Distributed Syst., 2022
Introduction and Evaluation of Attachability for Mobile IoT Routing Protocols With Markov Chain Analysis.
IEEE Trans. Netw. Serv. Manag., 2022
ReMap: Reliability Management of Peak-Power-Aware Real-Time Embedded Systems Through Task Replication.
IEEE Trans. Emerg. Top. Comput., 2022
IEEE Trans. Emerg. Top. Comput., 2022
PVMC: Task Mapping and Scheduling Under Process Variation Heterogeneity in Mixed-Criticality Systems.
IEEE Trans. Emerg. Top. Comput., 2022
IEEE Trans. Emerg. Top. Comput., 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Toward the Design of Fault-Tolerance-Aware and Peak-Power-Aware Multicore Mixed-Criticality Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Peak-Power Aware Life-Time Reliability Improvement in Fault-Tolerant Mixed-Criticality Systems.
IEEE Open J. Circuits Syst., 2022
ARMOR: A Reliable and Mobility-Aware RPL for Mobile Internet of Things Infrastructures.
IEEE Internet Things J., 2022
Comput., 2022
A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues.
IEEE Access, 2022
2021
COACH: Consistency Aware Check-Pointing for Nonvolatile Processor in Energy Harvesting Systems.
IEEE Trans. Emerg. Top. Comput., 2021
High-Performance Predictable NVM-Based Instruction Memory for Real-Time Embedded Systems.
IEEE Trans. Emerg. Top. Comput., 2021
READY: Reliability- and Deadline-Aware Power-Budgeting for Heterogeneous Multicore Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE Trans. Computers, 2021
ELITE: An Elaborated Cross-Layer RPL Objective Function to Achieve Energy Efficiency in Internet-of-Things Devices.
IEEE Internet Things J., 2021
Ring-DVFS: Reliability-Aware Reinforcement Learning-Based DVFS for Real-Time Embedded Systems.
IEEE Embed. Syst. Lett., 2021
CATNAP-Sim: A Comprehensive Exploration and a Nonvolatile Processor Simulator for Energy Harvesting Systems.
IEEE Des. Test, 2021
Toward the Design of Fault-Tolerance- and Peak- Power-Aware Multi-Core Mixed-Criticality Systems.
CoRR, 2021
A Cluster-Based and Drop-aware Extension of RPL to Provide Reliability in IoT Applications.
Proceedings of the IEEE International Systems Conference, 2021
Improving the Timing Behaviour of Mixed-Criticality Systems Using Chebyshev's Theorem.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Simultaneous Management of Peak-Power and Reliability in Heterogeneous Multicore Embedded Systems.
IEEE Trans. Parallel Distributed Syst., 2020
IEEE Trans. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
A comprehensive analysis on the resilience of adiabatic logic families against transient faults.
Integr., 2020
An optimal analytical solution for maximizing expected battery lifetime using the calculus of variations.
Integr., 2020
IEEE Embed. Syst. Lett., 2020
Daemon computers versus clairvoyant computers: A pure theoretical viewpoint towards energy consumption of computing.
CoRR, 2020
CoRR, 2020
Impacts of Mobility Models on RPL-Based Mobile IoT Infrastructures: An Evaluative Comparison and Survey.
IEEE Access, 2020
IEEE Access, 2020
Peak-Power-Aware Primary-Backup Technique for Efficient Fault-Tolerance in Multicore Embedded Systems.
IEEE Access, 2020
2019
Peak Power Management to Meet Thermal Design Power in Fault-Tolerant Embedded Systems.
IEEE Trans. Parallel Distributed Syst., 2019
Effects of RPL objective functions on the primitive characteristics of mobile and static IoT infrastructures.
Microprocess. Microsystems, 2019
Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019
Online Peak Power and Maximum Temperature Management in Multi-core Mixed-Criticality Embedded Systems.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
2018
IEEE Trans. Sustain. Comput., 2018
ACM Trans. Embed. Comput. Syst., 2018
Microelectron. J., 2018
An Instruction-Level Quality-Aware Method for Exploiting STT-RAM Read Approximation Techniques.
IEEE Embed. Syst. Lett., 2018
IEEE Des. Test, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
IEEE Trans. Computers, 2017
Proceedings of the 2nd International Conference on System Reliability and Safety, 2017
2016
Two-State Checkpointing for Energy-Efficient Fault Tolerance in Hard Real-Time Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Parallel Distributed Syst., 2016
A Compile-Time Optimization Method for WCET Reduction in Real-Time Embedded Systems through Block Formation.
ACM Trans. Archit. Code Optim., 2016
2015
A Hardware Platform for Evaluating Low-Energy Multiprocessor Embedded Systems Based on COTS Devices.
IEEE Trans. Ind. Electron., 2015
ACM Trans. Archit. Code Optim., 2015
DRVS: Power-efficient reliability management through Dynamic Redundancy and Voltage Scaling under variations.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
dsReliM: Power-constrained reliability management in Dark-Silicon many-core chips under process variations.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015
2014
Microelectron. Reliab., 2014
Microelectron. J., 2014
2013
IEEE Trans. Instrum. Meas., 2013
Discrete feedback-based dynamic voltage scaling for safety critical real-time systems.
Sci. Iran., 2013
2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Microelectron. Reliab., 2012
Proceedings of the International Symposium on Communications and Information Technologies, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
A Comparative Study of System-Level Energy Management Methods for Fault-Tolerant Hard Real-Time Systems.
IEEE Trans. Computers, 2011
Microelectron. Reliab., 2011
Improving the energy efficiency of reversible logic circuits by the combined use of adiabatic styles.
Integr., 2011
Feedback-Based Energy Management in a Standby-Sparing Scheme for Hard Real-Time Systems.
Proceedings of the 32nd IEEE Real-Time Systems Symposium, 2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
Joint Reliable and Power-Efficient CDS-Based Topology Control for Wireless Multi-hop Networks.
Proceedings of the Recent Trends in Wireless and Mobile Networks, 2010
A Body Biasing Method for Charge Recovery Circuits: Improving the Energy Efficiency and DPA-Immunity.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
Proceedings of the 28th International Conference on Computer Design, 2010
Proceedings of the 28th International Conference on Computer Design, 2010
Schedule Swapping: A Technique for Temperature Management of Distributed Embedded Systems.
Proceedings of the IEEE/IFIP 8th International Conference on Embedded and Ubiquitous Computing, 2010
2009
Soft Error-Aware Voltage Scaling Technique for Power Minimization in Application-Specific Multiprocessor System-on-Chip.
J. Low Power Electron., 2009
Low energy single event upset/single event transient-tolerant latch for deep subMicron technologies.
IET Comput. Digit. Tech., 2009
Joint write policy and fault-tolerance mechanism selection for caches in DSM technologies: Energy-reliability trade-off.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009
Proceedings of the The Forth International Conference on Availability, 2009
Proceedings of the The Forth International Conference on Availability, 2009
Fault Tolerant and Low Energy Write-Back Heterogeneous Set Associative Cache for DSM Technologies.
Proceedings of the The Forth International Conference on Availability, 2009
2008
Microelectron. Reliab., 2008
Proceedings of the Second International Symposium on Networks-on-Chips, 2008
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
A Low Power Error Detection Technique for Floating-Point Units in Embedded Applications.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008
An Asymmetric Checkpointing and Rollback Error Recovery Scheme for Embedded Processors.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008
2007
Feedback Redundancy: A Power Efficient SEU-Tolerant Latch Design for Deep Sub-Micron Technologies.
Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007
Joint consideration of fault-tolerance, energy-efficiency and performance in on-chip networks.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Combined time and information redundancy for SEU-tolerance in energy-efficient real-time systems.
IEEE Trans. Very Large Scale Integr. Syst., 2006
Cache size selection for performance, energy and reliability of time-constrained systems.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
Evaluation of Some Exponential Random Number Generators Implemented by FPGA.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2005
Energy efficient SEU-tolerance in DVS-enabled real-time systems through information redundancy.
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
2004
Microelectron. Reliab., 2004
Microprocess. Microsystems, 2004
Proceedings of the 10th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2004), 2004
A Mixed-Mode Simulation-Based Environment to Test and Dependability Assessment of HDL Models.
Proceedings of the International Conference on Embedded Systems and Applications, 2004
2003
Proceedings of the 2nd International Symposium on Parallel and Distributed Computing (ISPDC 2003), 2003
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Proceedings of the 2003 International Conference on Dependable Systems and Networks (DSN 2003), 2003
Dependability Analysis Using a Fault Injection Tool Based on Synthesizability of HDL Models.
Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003
2002
Proceedings of the Field-Programmable Logic and Applications, 2002