Hannah Honghua Yang

According to our database, Hannah Honghua Yang authored at least 31 papers between 1991 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2016

Circuit Partitioning: A Network-Flow-Based Balanced Min-Cut Approach.

Martin D. F. Wong, Hannah Honghua Yang

Encyclopedia of Algorithms, 2016

2008

Circuit Partitioning: A Network-Flow-Based Balanced Min-Cut Approach.

Hannah Honghua Yang, Martin D. F. Wong

Proceedings of the Encyclopedia of Algorithms - 2008 Edition, 2008

2007

Efficient Thermal via Planning Approach and Its Application in 3-D Floorplanning.

Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Wenjian Yu, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

MB^ast-Tree: A Multilevel Floorplanner for Large-Scale Building-Module Design.

Hsun-Cheng Lee, Yao-Wen Chang, Hannah Honghua Yang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2006

Efficient thermal-oriented 3D floorplanning and thermal via planning for two-stacked-die integration.

Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani

ACM Trans. Design Autom. Electr. Syst., 2006

Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization.

Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Yici Cai, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Integrating dynamic thermal via planning with 3D floorplanning algorithm.

Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng

Proceedings of the 2006 International Symposium on Physical Design, 2006

2005

A Theoretical Upper Bound for IP-Based Floorplanning.

Guowu Yang, Xiaoyu Song, Hannah Honghua Yang, Fei Xie

Proceedings of the Computing and Combinatorics, 11th Annual International Conference, 2005

Microarchitecture evaluation with floorplanning and interconnect pipelining.

Ashok Jagannathan, Hannah Honghua Yang, Kris Konigsfeld, Dan Milliron, Mosur Mohan, Michail Romesis, Glenn Reinman, Jason Cong

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Constrained floorplanning using network flows.

Yan Feng, Dinesh P. Mehta, Hannah Honghua Yang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Recursively combine floorplan and Q-place in mixed mode placement based on circuit's variety of block configuration.

Changqi Yang, Xianlong Hong, Hannah Honghua Yang, Qiang Zhou, Yici Cai, Yongqiang Lu

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

Integrated floorplanning with buffer/channel insertion for bus-based designs.

Faran Rafiq, Malgorzata Chrzanowska-Jeske, Hannah Honghua Yang, Marcin Jeske, Naveed A. Sherwani

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Constrained "Modern" Floorplanning.

Yan Feng, Dinesh P. Mehta, Hannah Honghua Yang

Proceedings of the 2003 International Symposium on Physical Design, 2003

Multilevel floorplanning/placement for large-scale modules using B*-trees.

Hsun-Cheng Lee, Yao-Wen Chang, Jer-Ming Hsu, Hannah Honghua Yang

Proceedings of the 40th Design Automation Conference, 2003

2002

Integrated floorplanning with buffer/channel insertion for bus-based microprocessor designs.

Faran Rafiq, Malgorzata Chrzanowska-Jeske, Hannah Honghua Yang, Naveed A. Sherwani

Proceedings of 2002 International Symposium on Physical Design, 2002

2001

On extending slicing floorplan to handle L/T-shaped modules andabutment constraints.

Evangeline F. Y. Young, Martin D. F. Wong, Hannah Honghua Yang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Faster and more accurate wiring evaluation in interconnect-centric floorplanning.

Hung-Ming Chen, D. F. Wong, Wai-Kei Mak, Hannah Honghua Yang

Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

2000

Slicing floorplans with range constraint.

Evangeline F. Y. Young, Martin D. F. Wong, Hannah Honghua Yang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1999

Slicing floorplans with boundary constraints.

Evangeline F. Y. Young, Martin D. F. Wong, Hannah Honghua Yang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Logic Verification of Very Large Circuits Using Shark.

Jeremy Casas, Hannah Honghua Yang, Manpreet Khaira, Mandar Joshi, Thomas Tetzlaff, Steve W. Otto, Erik Seligman

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

Integrated floorplanning and interconnect planning.

Hung-Ming Chen, Hai Zhou, Fung Yu Young, D. F. Wong, Hannah Honghua Yang, Naveed A. Sherwani

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

1998

Optimal min-area min-cut replication in partitioned circuits.

Hannah Honghua Yang, Martin D. F. Wong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1996

Balanced partitioning.

Hannah Honghua Yang, Martin D. F. Wong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

1995

New algorithms for min-cut replication in partitioned circuits.

Hannah Honghua Yang, D. F. Wong

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Circuit clustering for delay minimization under area and pin constraints.

Honghua Yang, D. F. Wong

Proceedings of the 1995 European Design and Test Conference, 1995

1994

Finding the Closed Partition of a Planar Graph.

Vijaya Ramachandran, Honghua Yang

Algorithmica, 1994

An Efficient Parallel Algorithm for the General Planar Monotone Circuit Value Problem.

Vijaya Ramachandran, Honghua Yang

Proceedings of the Fifth Annual ACM-SIAM Symposium on Discrete Algorithms. 23-25 January 1994, 1994

Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs.

Hannah Honghua Yang, D. F. Wong

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Efficient network flow based min-cut balanced partitioning.

Honghua Yang, D. F. Wong

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993

An Efficient Parallel Algorithm for the Layered Planar Monotone Circuit Value Problem.

Vijaya Ramachandran, Honghua Yang

Proceedings of the Algorithms - ESA '93, First Annual European Symposium, Bad Honnef, Germany, September 30, 1993

1991

An NC algorithm for the general planar monotone circuit value problem.

Honghua Yang

Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing, 1991