Heiko Hübert
Orcid: 0009-0005-5230-6559
According to our database1,
Heiko Hübert
authored at least 18 papers
between 2000 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Proceedings of the 2024 ACM/IEEE International Conference on Human-Robot Interaction, 2024
Proceedings of the Artificial Intelligence in Education. Posters and Late Breaking Results, Workshops and Tutorials, Industry and Innovation Tracks, Practitioners, Doctoral Consortium and Blue Sky, 2024
2023
Proceedings of the HCI International 2023 Posters, 2023
Analyzing Learners' Emotion from an HRI Experiment Using Facial Expression Recognition Systems.
Proceedings of the Learning and Collaboration Technologies, 2023
2022
Proceedings of the Artificial Intelligence in Education. Posters and Late Breaking Results, Workshops and Tutorials, Industry and Innovation Tracks, Practitioners' and Doctoral Consortium, 2022
2013
Architecture of a Low Latency Image Rectification Engine for Stereoscopic 3-D HDTV Processing.
IEEE Trans. Circuits Syst. Video Technol., 2013
2012
Parallel paradigms and run-time management techniques for many-core architectures: the 2PARMA approach.
Proceedings of the 2012 Interconnection Network Architecture, 2012
2011
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
2010
2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures.
Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010
2009
MEMTRACE: a memory, performance and energy profiler targeting RISC-based embedded systems for data intensive applications.
PhD thesis, 2009
Profiling-Based Hardware/Software Co-Exploration for the Design of Video Coding Architectures.
IEEE Trans. Circuits Syst. Video Technol., 2009
Power Modeling of an Embedded RISC Core for Function-Accurate Energy Profiling.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2009
2007
A System on a Chip Architecture of an H.264/AVC Coprocessor for DVB-H and DMB Applications.
IEEE Trans. Consumer Electron., 2007
Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007
2004
Proceedings of the 2nd Workshop on Embedded Systems for Real-Time Multimedia, 2004
2000
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000