Jaemin Choi
Orcid: 0000-0003-2023-6267
  According to our database1,
  Jaemin Choi
  authored at least 35 papers
  between 2005 and 2025.
  
  
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
  2025
PoBiTag: Toward Unobtrusive and Customizable Tag-Based Interaction With Optical Polarization and Birefringence.
    
  
    IEEE Access, 2025
    
  
MagPie: Extending a Smartphone's Interaction Space via a Customizable Magnetic Back-of-Device Input Accessory.
    
  
    Proceedings of the 2025 CHI Conference on Human Factors in Computing Systems, 2025
    
  
  2024
MagID: Enhancing the Functionality of Off-the-Shelf Smartphones Through Magnetic Accessory Identification.
    
  
    IEEE Access, 2024
    
  
A Study on Point Cloud Clustering for Geo-referenced Positioning using mmWave Radar Sensor.
    
  
    Proceedings of the 29th IEEE Asia Pacific Conference on Communications, 2024
    
  
  2023
    Proc. ACM Program. Lang., October, 2023
    
  
A 1.1V 6.4Gb/s/pin 24-Gb DDR5 SDRAM with a Highly-Accurate Duty Corrector and NBTI-Tolerant DLL.
    
  
    Proceedings of the IEEE International Solid- State Circuits Conference, 2023
    
  
    Proceedings of the 14th International Conference on Information and Communication Technology Convergence, 2023
    
  
    Proceedings of the 14th International Conference on Information and Communication Technology Convergence, 2023
    
  
  2022
    Parallel Comput., 2022
    
  
Compass: strong and compositional library specifications in relaxed memory separation logic.
    
  
    Proceedings of the PLDI '22: 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation, San Diego, CA, USA, June 13, 2022
    
  
    Proceedings of the IWOCL'22: International Workshop on OpenCL, Bristol, United Kingdom, May 10, 2022
    
  
    Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022
    
  
    Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
    
  
  2021
    CoRR, 2021
    
  
25.2 A 16Gb Sub-1V 7.14Gb/s/pin LPDDR5 SDRAM Applying a Mosaic Architecture with a Short-Feedback 1-Tap DFE, an FSS Bus with Low-Level Swing and an Adaptively Controlled Body Biasing in a 3<sup>rd</sup>-Generation 10nm DRAM.
    
  
    Proceedings of the IEEE International Solid-State Circuits Conference, 2021
    
  
GPU-aware Communication with UCX in Parallel Programming Models: Charm++, MPI, and Python.
    
  
    Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021
    
  
    Proceedings of the HPDC '21: The 30th International Symposium on High-Performance Parallel and Distributed Computing, 2021
    
  
    Proceedings of the 6th IEEE/ACM International Workshop on Extreme Scale Programming Models and Middleware, 2021
    
  
  2020
    Proceedings of the 5th IEEE/ACM International Workshop on Extreme Scale Programming Models and Middleware, 2020
    
  
    Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020
    
  
  2019
  2018
A 4.0-10.0-Gb/s Referenceless CDR with Wide-Range, Jitter-Tolerant, and Harmonic-Lock-Free Frequency Acquisition Technique.
    
  
    Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
    
  
  2017
    Proceedings of the International SoC Design Conference, 2017
    
  
  2009
Research about extracting and analyzing accounting data of company to detect financial fraud.
    
  
    Proceedings of the IEEE International Conference on Intelligence and Security Informatics, 2009
    
  
  2005
    Proceedings of the Computational Science and Its Applications, 2005