Junha Lee
According to our database1,
Junha Lee authored at least 35 papers
between 2012 and 2026.
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Bibliography
2026
CoRR, April, 2026
CoRR, January, 2026
2025
Progressive Weight Loading: Accelerating Initial Inference and Gradually Boosting Performance on Resource-Constrained Environments.
CoRR, September, 2025
Affogato: Learning Open-Vocabulary Affordance Grounding with Automated Data Generation at Scale.
CoRR, June, 2025
Self-Supervised Learning with Probabilistic Density Labeling for Rainfall Probability Estimation.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2025
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2025
2024
Exploring the Potential of Novel Image-to-Text Generators as Prompt Engineers for CivitAI Models.
Proceedings of the 16th IIAI International Congress on Advanced Applied Informatics, 2024
Proceedings of the Forty-first International Conference on Machine Learning, 2024
2023
2022
Stanford MLab at SemEval 2022 Task 7: Tree- and Transformer-Based Methods for Clarification Plausibility.
Proceedings of the 16th International Workshop on Semantic Evaluation, SemEval@NAACL 2022, 2022
Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022
2021
A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage.
IEEE J. Solid State Circuits, 2021
A 512Gb 3b/Cell 7<sup>th</sup> -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the 2021 IEEE/CVF International Conference on Computer Vision, 2021
2020
A 1.8 Gb/s/pin 16Tb NAND Flash Memory Multi-Chip Package with F-Chip of Toggle 4.0 Specification for High Performance and High Capacity Storage Systems.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020
2019
Int. J. Softw. Eng. Knowl. Eng., 2019
2018
Dual-Loop Two-Step ZQ Calibration for Dynamic Voltage-Frequency Scaling in LPDDR4 SDRAM.
IEEE J. Solid State Circuits, 2018
A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 22nd International Conference on Engineering of Complex Computer Systems, 2017
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
2016
Frontiers Comput. Sci., 2016
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
Measuring Class Cohesion Based on Iterative Process Using External Class Relationships.
Proceedings of the 2014 14th International Conference on Quality Software, 2014
Recommending process improvement package using direct and indirect relationships of activities.
Proceedings of the 4th International Workshop on Recommendation Systems for Software Engineering, 2014
2012
Impact of fin thickness and height on read stability / write ability in tri-gate FinFET based SRAM.
Proceedings of the International SoC Design Conference, 2012
Static read stability and write ability metrics in FinFET based SRAM considering read and write-assist circuits.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Proceedings of the Intelligent Autonomous Systems 12, 2012