Jinfeng Kang

According to our database1, Jinfeng Kang authored at least 20 papers between 2009 and 2019.

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Bibliography

2019
A Novel Convolution Computing Paradigm Based on NOR Flash Array With High Computing Speed and Energy Efficiency.
IEEE Trans. on Circuits and Systems, 2019

Circuit design of RRAM-based neuromorphic hardware systems for classification and modified Hebbian learning.
SCIENCE CHINA Information Sciences, 2019

Efficient evaluation model including interconnect resistance effect for large scale RRAM crossbar array matrix computing.
SCIENCE CHINA Information Sciences, 2019

FNSim: A Device-Circuit-Algorithm Codesigned Simulator for Flash based Neural Network.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

3D Vertical RRAM Array and Device Co-design with Physics-based Spice Model.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

Parallel Stateful Logic in RRAM: Theoretical Analysis and Arithmetic Design.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018
Design and Hardware Implementation of Neuromorphic Systems With RRAM Synapses and Threshold-Controlled Neurons for Pattern Recognition.
IEEE Trans. on Circuits and Systems, 2018

A Novel Convolution Computing Paradigm Based on NOR Flash Array with High Computing Speed and Energy Efficient.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Testing of 1TnR RRAM array with sneak path technique.
SCIENCE CHINA Information Sciences, 2017

2016
Device and Circuit Interaction Analysis of Stochastic Behaviors in Cross-Point RRAM Arrays.
CoRR, 2016

Physical understanding and optimization of resistive switching characteristics in oxide-RRAM.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015
Doping profile modification approach of the optimization of HfO x based resistive switching device by inserting AlO x layer.
SCIENCE CHINA Information Sciences, 2015

RRAM based synaptic devices for neuromorphic visual systems.
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Modeling and design optimization of ReRAM.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Design guidelines for 3D RRAM cross-point architecture.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Scaling and operation characteristics of HfOx based vertical RRAM for 3D cross-point architecture.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Parameters extraction on HfOX based RRAM.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2010
A novel voltage-type sense amplifier for low-power nonvolatile memories.
SCIENCE CHINA Information Sciences, 2010

2009
Challenges of 22 nm and beyond CMOS technology.
Science in China Series F: Information Sciences, 2009


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