Yuhua Cheng

This page is a disambiguation page, it actually contains multiple papers from persons of the same or a similar name.

Bibliography

2026
Bistable PT-Symmetric WPT Systems With Laterally Arranged Relays and Coupling Detuning.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2026

A 125- μ W 14-bit 5-MS/s pipelined-SAR ADC with linearity-enhanced bootstrapped switch and kT/C noise cancellation.
Microelectron. J., 2026

2025
PACR-DETR: A Real-Time End-to-End Object Detector for Behavior Recognition in Various Classroom Scenarios.
IEEE Trans. Instrum. Meas., 2025

Optimizing Path Planning and Conflict Resolution in High-Density AS/RS With a Multishuttle Cooperative Scheduling Framework.
IEEE Trans. Instrum. Meas., 2025

Three-dimensional design of SOI LDMOS with high-k film trench and L-shaped gate.
Microelectron. J., 2025

Numerical investigation on buried gate and drift region with P-type blocks in trench SOI LDMOS.
Microelectron. J., 2025

2024
Optimized Design of EdgeBoard Intelligent Vehicle Based on PP-YOLOE+.
Sensors, May, 2024

MITDCNN: A multi-modal input Transformer-based deep convolutional neural network for misfire signal detection in high-noise diesel engines.
Expert Syst. Appl., March, 2024

Bidirectional Wireless Sensing Based on Coexistent PT and Anti-PT Symmetries.
IEEE Trans. Instrum. Meas., 2024

Adaptive adjacent context negotiation network for object detection in remote sensing imagery.
PeerJ Comput. Sci., 2024

Incipient fault detection based on dense feature ensemble net.
Neurocomputing, 2024

Generation of 1 km high resolution Standardized precipitation evapotranspiration Index for drought monitoring over China using Google Earth Engine.
Int. J. Appl. Earth Obs. Geoinformation, 2024

2023
Table Tennis Track Detection Based on Temporal Feature Multiplexing Network.
Sensors, February, 2023

An Integrated System of Blood Pressure and Electrocardiograph Recordings for Smart Home Healthcare Network.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2021
Design and optimization of an integrated MEMS gas chamber with high transmissivity.
Digit. Commun. Networks, 2021

Spatial Selected Spin Filtering Effect in Z-Shaped MoS<sub>2</sub> Nanoribbon.
IEEE Access, 2021

Multi-physiological Parameters Integrated Medical System for Home Healthcare Application.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2019
An algorithm to optimize deployment of charging base stations for WRSN.
EURASIP J. Wirel. Commun. Netw., 2019

Fully Parallel Architecture for Semi-global Stereo Matching with Refined Rank Method.
CoRR, 2019

Improving Power Delivery of CPT for Biomedical Implants by Using Conjugate Impedance Matching.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

Circuit Design Challenges of ADC for the Application in Multiple Physiological Parameters Detection System.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018
Chip-Scale Coils for Millimeter-Sized Bio-Implants.
IEEE Trans. Biomed. Circuits Syst., 2018

A 700-MS/s 6-bit SAR ADC with partially active reference voltage buffer.
IEICE Electron. Express, 2018

A 4 GS/s 6-bit 4-2 segmented current-steering DAC with compact current cells.
IEICE Electron. Express, 2018

New AC resistance calculation of printed spiral coils for wireless power transfer.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

A 12GS/s 6-bit DAC with 4-2 Segmentation in 40nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Duty Cycle Distortion in Half-rate Nyquist DACs with Limited Output Bandwidth.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Text2Sketch: Learning Face Sketch from Facial Attribute Text.
Proceedings of the 2018 IEEE International Conference on Image Processing, 2018

2017
Signal processing system-on-chip design for biomedical applications.
IEICE Electron. Express, 2017

Modeling of mm-sized solenoid coils with ferrite tube core for biomedical implants.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

Analysis and characterization of process/layout impacts on the performance of high-speed analog circuits.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 6-bit 700-MS/s single-channel SAR ADC with low kickback noise comparator in 40-nm CMOS.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

Auxiliary testability design schemes for CMOS DACs with ultrahigh sampling rates.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

Characterization of single-crystalline graphene ESD interconnects.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
A Systematic Study of ESD Protection Co-Design With High-Speed and High-Frequency ICs in 28 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A 1.1V 12μW 86dB DR Sigma-Delta Modulator for Health Monitoring System.
J. Circuits Syst. Comput., 2016

Modeling and optimization of mm-sized solenoid coils for biomedical implants.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

2015
Doping profile modification approach of the optimization of HfO x based resistive switching device by inserting AlO x layer.
Sci. China Inf. Sci., 2015

A 6bit 4GS/s current-steering digital-to-analog converter in 40nm CMOS with adjustable bias and DfT block.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A 1-V 23-μW 88-dB DR Sigma-Delta ADC for high-accuracy and low-power applications.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A 6b 2b/cycle SAR ADC beyond 1GS/s with hybrid DAC structure and low kickback noise comparators.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A 1.8-V 12-bit self-calibrating SAR ADC with a novel comparator.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
A 6-bit 2 GS/s ADC in 65 nm CMOS.
Sci. China Inf. Sci., 2014

A low-power, area-efficient all-digital delay-locked loop for DDR3 SDRAM controller.
Sci. China Inf. Sci., 2014

A leakage current suppression technique for cascade SRAM array in 55 nm CMOS technology.
Sci. China Inf. Sci., 2014

The Construction of a Clinical Decision Support System Based on Knowledge Base.
Proceedings of the Service Science and Knowledge Innovation, 2014

2013
Research and design of a power management chip for wireless powering capsule endoscopy.
Microelectron. Reliab., 2013

Post-Si Programmable ESD Protection Circuit Design: Mechanisms and Analysis.
IEEE J. Solid State Circuits, 2013

A 6-bit 1GS/s DAC using an area efficient switching scheme for gradient-error tolerance.
IEICE Electron. Express, 2013

All switched-capacitor realized piezoresistive pressure sensor interface chip for automotive TPMS.
IEICE Electron. Express, 2013

An optimized UWB correlator design with the consideration of the impacts from the ESD protection devices.
Sci. China Inf. Sci., 2013

High effective medical image segmentation with model adjustable method.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Design and analysis of full-chip HV ESD protection in BCD30V for mixed-signal ICs.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

An innovative exciting coil design for magneto-optic imaging in nondestructive evaluation.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2013

Co-design of ESD protection and LNA in RFIC.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

The decimator with multiplier-free realizations for high precision ADC applications.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

Characteristics of n-MOSFETs with stress effects from neighborhood devices.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

A 5kV ESD-protected 2.4GHz PA in 180nm RFCMOS optimized by ESD-PA co-design technique.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

Device parameter variations of n-MOSFETS with dog-bone layouts in 65nm and 40nm technologies.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012
A low power and small area all digital delay-locked loop based on ring oscillator architecture.
Sci. China Inf. Sci., 2012

A design technique overview on broadband RF ESD protection circuit designs.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A low power IC for efficient de-interlacing based on refined motion adaptive method.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

An information integration system of signal intersection with multi-mode traffic data collection and analysis.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

VLSI implementation of color interpolation in color difference spaces.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Field programmable SONOS ESD protection design.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
Co-design of ESD protection and UWB RF front-end ICs.
Sci. China Inf. Sci., 2011

An efficient and stable power management circuit with high output energy for wireless powering capsule endoscopy.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

A wide lock-range, low jitter phase-locked loop for multi-standard SerDes application.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

Characterization and analysis of pattern dependent variation-aware interconnects for a 65nm technology.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

ASIC implementation of an OFDM baseband transceiver for HINOC.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A dual 12bit 80MSPS 3.3V Current-Steering DAC for HINOC.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2008
High-speed serial interconnect transceiver: Applications and design.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2006
Characterization, design, modeling, and model validation of silicon-wafer M: N balun components under matched and unmatched conditions.
IEEE J. Solid State Circuits, 2006

Analysis of Hybrid Translinear Circuit and Its Application.
Proceedings of the International MultiConference of Engineers and Computer Scientists 2006, 2006

Translinear Loop Principle and Identification of the Translinear Loops.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
Process variability characterization and interconnect modeling.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

Foundries, EDA vendors, and designers: who shoulders the blame when a design doesn't work in the nano-scale and wireless era?
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
High-frequency characterization and modeling of distortion behavior of MOSFETs for RF IC design.
IEEE J. Solid State Circuits, 2004

2003
MOSFET HF distortion behavior and modeling for RF IC design.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002
MOSFET modeling for low noise, RF circuit design.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2000
MOS transistor modeling for RF IC design.
IEEE J. Solid State Circuits, 2000

1998
A unified MOSFET channel charge model for device modeling in circuit simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1996
Device design for low power electronics with accurate deep submicrometer LDD-MOSFET models.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996


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