Joseph Zuckerman
Orcid: 0000-0003-3081-1077
According to our database1,
Joseph Zuckerman authored at least 22 papers
between 2020 and 2026.
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Bibliography
2026
EPOCHS-1: A 12 nm Highly Heterogeneous Open-Source SoC With Distributed Coin-Based Power Management and Integrated Hybrid Voltage Regulation.
IEEE J. Solid State Circuits, May, 2026
2025
FLIP2M: Flexible Intra-layer Parallelism and Inter-layer Pipelining for Multi-model AR/VR Workloads.
ACM Trans. Embed. Comput. Syst., 2025
BASTION: A Framework for Secure Third-Party IP Integration in NoC-based SoC Platforms.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025
BlitzCoin: A Decentralized Hardware Solution for Power Management of Highly Heterogeneous Systems on Chip.
IEEE Micro, 2025
Optimization of Wire Pipelining and Channel Parallelism for 2D-Mesh NoC Physical Design.
Proceedings of the 43rd IEEE International Conference on Computer Design, 2025
ReconFormer: A Multi-Level Run-Time Reconfigurable System-on-Chip for Accelerating Transformers.
Proceedings of the 35th International Conference on Field-Programmable Logic and Applications, 2025
KalmMind: A Configurable Kalman Filter Design Framework for Embedded Brain-Computer Interfaces.
Proceedings of the Design, Automation & Test in Europe Conference, 2025
An Energy-Efficient Kalman Filter Architecture with Tunable Accuracy for Brain-Computer Interfaces.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025
2024
Towards Generalized On-Chip Communication for Programmable Accelerators in Heterogeneous Architectures.
CoRR, 2024
A 400-ns-Settling- Time Hybrid Dynamic Voltage Frequency Scaling Architecture and Its Application in a 22-Core Network-on-Chip SoC in 12-nm FinFET Technology.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques, 2024
2023
IEEE Des. Test, December, 2023
A 12nm 18.1TFLOPs/W Sparse Transformer Processor with Entropy-Based Early Exit, Mixed-Precision Predication and Fine-Grained Power Management.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
DECADES: A 67mm<sup>2</sup>, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2022
A Scalable Methodology for Agile Chip Development with Open-Source Hardware Components.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
Cohmeleon: Learning-Based Orchestration of Accelerator Coherence in Heterogeneous SoCs.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020