Juan Núñez
Orcid: 0000-0002-0279-9472Affiliations:
- University of Seville, Institute of Microelectronics (IMSE-CNM), Spain
According to our database1,
Juan Núñez
authored at least 44 papers
between 2006 and 2023.
Collaborative distances:
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Bibliography
2023
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023
Exploitation of Subharmonic Injection Locking for Solving Combinatorial Optimization Problems with Coupled Oscillators using VO2 based devices.
Proceedings of the 19th International Conference on Synthesis, 2023
Proceedings of the 19th International Conference on Synthesis, 2023
Characterizing BTI and HCD in 1.2V 65nm CMOS Oscillators made from Combinational Standard Cells and Processor Logic Paths.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
2022
How Frequency Injection Locking Can Train Oscillatory Neural Networks to Compute in Phase.
IEEE Trans. Neural Networks Learn. Syst., 2022
IEEE Embed. Syst. Lett., 2022
Mitigating the Impact of Variability in NCFET-based Coupled-Oscillator Networks Applications.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
2021
IEEE Trans. Emerg. Top. Comput., 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2020
Projection of Dual-Rail DPA Countermeasures in Future FinFET and Emerging TFET Technologies.
ACM J. Emerg. Technol. Comput. Syst., 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Emerging technologies and computing paradigms for the Internet of Everything applications. International Journal of Circuit, Theory, and Applications.
Int. J. Circuit Theory Appl., 2019
Proceedings of the 16th International Conference on Synthesis, 2019
An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks.
Proceedings of the 16th International Conference on Synthesis, 2019
2018
Impact of the RT-level architecture on the power performance of tunnel transistor circuits.
Int. J. Circuit Theory Appl., 2018
Design Considerations of an SRAM Array for the Statistical Validation of Time-Dependent Variability Models.
Proceedings of the 15th International Conference on Synthesis, 2018
Proceedings of the 15th International Conference on Synthesis, 2018
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018
2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
Secure cryptographic hardware implementation issues for high-performance applications.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
2015
An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
2014
Experimental Validation of a Two-Phase Clock Scheme for Fine-Grained Pipelined Circuits Based on Monostable to Bistable Logic Elements.
IEEE Trans. Very Large Scale Integr. Syst., 2014
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014
2013
Microelectron. J., 2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
2012
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012
Proceedings of the Technological Innovation for Value Creation, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2011
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006