Yu-Shiang Lin

Orcid: 0000-0002-0625-0364

According to our database1, Yu-Shiang Lin authored at least 31 papers between 2005 and 2023.

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Bibliography

2023
A Novel Two-Stage Induced Deep Learning System for Classifying Similar Drugs with Diverse Packaging.
Sensors, August, 2023

2021
Deep Learning-Based Hepatocellular Carcinoma Histopathology Image Classification: Accuracy Versus Training Dataset Size.
IEEE Access, 2021

2020
Efficient Group Fault Tolerance for Multi-tier Services in Cloud Environments.
Proceedings of the 2020 IEEE International Conference on Communications, 2020

2019
Performance Optimization for InfiniBand Virtualization on QEMU/KVM.
Proceedings of the 2019 IEEE International Conference on Cloud Computing Technology and Science (CloudCom), 2019

qCUDA: GPGPU Virtualization for High Bandwidth Efficiency.
Proceedings of the 2019 IEEE International Conference on Cloud Computing Technology and Science (CloudCom), 2019

2016
One-Cycle Correction of Timing Errors in Pipelines With Standard Clocked Elements.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Gate movement for timing improvement on row based Dual-VDD designs.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

Synthesis design strategies for energy-efficient microprocessors.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2015
GPU-UPGMA: high-performance computing for UPGMA algorithm based on graphics processing units.
Concurr. Comput. Pract. Exp., 2015

CUDA ClustalW: An efficient parallel algorithm for progressive multiple sequence alignment on Multi-GPUs.
Comput. Biol. Chem., 2015

2014
Efficient parallel algorithm for multiple sequence alignments with regular expression constraints on graphics processing units.
Int. J. Comput. Sci. Eng., 2014

Row Based Dual-VDD Island Generation and Placement.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Efficient parallel algorithm for compound comparisons on multi-GPUs.
Proceedings of the 2014 IEEE International Conference on Bioinformatics and Biomedicine, 2014

2013
A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells.
IEEE J. Solid State Circuits, 2013

Multiple Sequence Alignments with Regular Expression Constraints on a Cloud Service System.
Int. J. Grid High Perform. Comput., 2013

A pipeline architecture with 1-cycle timing error correction for low voltage operations.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

2012
Parallel UPGMA Algorithm on Graphics Processing Units Using CUDA.
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

GPU-based cloud service for multiple sequence alignments with regular expression constrains.
Proceedings of the 4th IEEE International Conference on Cloud Computing Technology and Science Proceedings, 2012

2010
Circuit design advances to enable ubiquitous sensing environments.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Alignment-Independent Chip-to-Chip Communication for Sensor Applications Using Passive Capacitive Signaling.
IEEE J. Solid State Circuits, 2009

A Low-Voltage Processor for Sensing Applications With Picowatt Standby Mode.
IEEE J. Solid State Circuits, 2009

A 150pW program-and-hold timer for ultra-low-power sensor platforms.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Near-field communication using phase-locking and pulse signaling for millimeter-scale systems.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
Single stage static level shifter design for subthreshold to I/O voltage conversion.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

Low-voltage circuit design for widespread sensing applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

An ultra low power 1V, 220nW temperature sensor for passive wireless applications.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
An efficient implementation of a low-complexity MP3 algorithm with a stream cipher.
Multim. Tools Appl., 2007

A sub-pW timer using gate leakage for ultra low-power sub-Hz monitoring systems.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

Runtime leakage power estimation technique for combinational circuits.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2005
A low-complexity MP3 algorithm that uses a new rate control and a fast dequantization.
IEEE Trans. Consumer Electron., 2005

A New Asymmetric Skewed Buffer Design for Runtime Leakage Power Reduction.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005


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