Mitchell A. Thornton

According to our database, Mitchell A. Thornton authored at least 136 papers between 1993 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

A Photonic Physically Unclonable Function's Resilience to Multiple-Valued Machine Learning Attacks.

Jessie M. Henderson, Elena R. Henderson, Clayton A. Harper, Hiva Shahoei, William V. Oxford, Eric C. Larson, Duncan L. MacFarlane, Mitchell A. Thornton

CoRR, 2024

2023

CNN-Assisted Steganography - Integrating Machine Learning with Established Steganographic Techniques.

Andrew Havard, Theodore W. Manikas, Eric C. Larson, Mitchell A. Thornton

CoRR, 2023

Automatic Modulation Classification with Deep Neural Networks.

Clayton A. Harper, Mitchell A. Thornton, Eric C. Larson

CoRR, 2023

Multiple-Valued Logic Physically Unclonable Function in Photonic Integrated Circuits.

Duncan L. MacFarlane, Hiva Shahoei, Ifeanyi G. Achu, Evan Stewart, William V. Oxford, Mitchell A. Thornton

Proceedings of the 53rd IEEE International Symposium on Multiple-Valued Logic, 2023

Data Leakage in Isolated Virtualized Enterprise Computing Systems.

Zechariah Wolf, Eric Larson, Mitchell A. Thornton

Proceedings of the 9th International Conference on Information Systems Security and Privacy, 2023

Using Time Series Clustering to Inform Multimodal CNN Architectures.

Joshua Sylvester, Matthew Lee, Daniel Canon Ellis, Mitchell A. Thornton, Eric C. Larson

Proceedings of the 52nd IEEE Applied Imagery Pattern Recognition Workshop, 2023

Impacts of Synthetically Generated Data on Trackformer-based Multi-Object Tracking.

Matthew Lee, Clayton A. Harper, William Flinchbaugh, Eric C. Larson, Mitchell A. Thornton

Proceedings of the 52nd IEEE Applied Imagery Pattern Recognition Workshop, 2023

2022

Automated Quantum Memory Compilation with Improved Dynamic Range.

Aviraj Sinha, Elena R. Henderson, Jessie M. Henderson, Mitchell A. Thornton

CoRR, 2022

General Process Detection Through Physical Side Channel Characterization.

Michael A. Taylor, Eric C. Larson, Mitchell A. Thornton

Proceedings of the IEEE International Systems Conference, 2022

A Side Channel Attack Detection System Using Processor Core Events and a Support Vector Machine.

Rob Oshana, Mitchell A. Thornton, Mike Caraman

Proceedings of the 11th Mediterranean Conference on Embedded Computing, 2022

Quantum Multiple Valued Kernel Circuits.

Aviraj Sinha, Mitchell A. Thornton

Proceedings of the 52nd IEEE International Symposium on Multiple-Valued Logic, 2022

Controller Area Network (CAN) Bus Transceiver with Authentication Support.

Xianshan Wen, Ruobing Hua, Jianye Liu, Tao Fu, Liang Fang, Xiaoran Wang, Mitchell A. Thornton, Ping Gui

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Side Channel Identification using Granger Time Series Clustering with Applications to Control Systems.

Matthew Lee, Joshua Sylvester, Sunjoli Aggarwal, Aviraj Sinha, Michael A. Taylor, Nathan Srirama, Eric C. Larson, Mitchell A. Thornton

Proceedings of the 8th International Conference on Information Systems Security and Privacy, 2022

SMU-DDI Cyber Autonomy Range.

Darrell L. Young, Mark Bigham, Mark Bradbury, Eric Larson, Mitchell A. Thornton

Proceedings of the 51st IEEE Applied Imagery Pattern Recognition Workshop, 2022

2021

Real-Time Edge Processing Detection of Malicious Attacks Using Machine Learning and Processor Core Events.

Rob Oshana, Mitchell A. Thornton, Eric C. Larson, Xavier Roumegue

Proceedings of the IEEE International Systems Conference, 2021

Rapid Ransomware Detection through Side Channel Exploitation.

Michael A. Taylor, Eric C. Larson, Mitchell A. Thornton

Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2021

Industrial Control System Anomaly Detection Using Convolutional Neural Network Consensus.

Aviraj Sinha, Michael A. Taylor, Nathan Srirama, Theodore W. Manikas, Eric C. Larson, Mitchell A. Thornton

Proceedings of the IEEE Conference on Control Technology and Applications, 2021

SNR-Boosted Automatic Modulation Classification.

Clayton A. Harper, Aviraj Sinha, Mitchell A. Thornton, Eric C. Larson

Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021

2020

A 2.56-Gb/s Serial Wireline Transceiver That Supports an Auxiliary Channel in 65-nm CMOS.

Xiaoran Wang, Tianwei Liu, Shita Guo, Mitchell A. Thornton, Ping Gui

IEEE Trans. Very Large Scale Integr. Syst., 2020

Higher Dimension Quantum Entanglement Generators.

Kaitlin N. Smith, Mitchell A. Thornton

ACM J. Emerg. Technol. Comput. Syst., 2020

Introduction to Quantum Computation Reliability.

Mitchell A. Thornton

Proceedings of the IEEE International Test Conference, 2020

Fast Minimization of Polynomial Decomposition using Fixed-Polarity Pascal Transforms.

Kaitlin N. Smith, Mitchell A. Thornton, D. Michael Miller

Proceedings of the 50th IEEE International Symposium on Multiple-Valued Logic, 2020

A Quantum Photonic TRNG based on Quaternary Logic.

Kaitlin N. Smith, Duncan L. MacFarlane, Mitchell A. Thornton

Proceedings of the 50th IEEE International Symposium on Multiple-Valued Logic, 2020

Enhanced Automatic Modulation Classification using Deep Convolutional Latent Space Pooling.

Clayton A. Harper, Lauren Lyons, Mitchell A. Thornton, Eric C. Larson

Proceedings of the 54th Asilomar Conference on Signals, Systems, and Computers, 2020

2019

Keyboard Snooping from Mobile Phone Arrays with Mixed Convolutional and Recurrent Neural Networks.

Tyler Giallanza, Travis Siems, Elena Smith, Erik Gabrielsen, Ian Johnson, Mitchell A. Thornton, Eric C. Larson

Proc. ACM Interact. Mob. Wearable Ubiquitous Technol., 2019

Fixed Polarity Pascal Transforms with Symbolic Computer Algebra Applications.

Kaitlin N. Smith, Mitchell A. Thornton

Proceedings of the IEEE Pacific Rim Conference on Communications, 2019

Quantum Logic Synthesis with Formal Verification.

Kaitlin N. Smith, Mitchell A. Thornton

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Entanglement in Higher-Radix Quantum Systems.

Kaitlin N. Smith, Mitchell A. Thornton

Proceedings of the 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL), 2019

Task Value Calculus: Multi-Objective Trade off Analysis Using Multiple-Valued Decision Diagrams.

Tyler Giallanza, Erik Gabrielsen, Michael A. Taylor, Eric C. Larson, Mitchell A. Thornton

Proceedings of the 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL), 2019

A quantum computational compiler and design tool for technology-specific targets.

Kaitlin N. Smith, Mitchell A. Thornton

Proceedings of the 46th International Symposium on Computer Architecture, 2019

Entangled State Preparation for Non-Binary Quantum Computing.

Kaitlin N. Smith, Mitchell A. Thornton

Proceedings of the 2019 IEEE International Conference on Rebooting Computing, 2019

2018

Higher-Radix Chrestenson Gates for Photonic Quantum Computation.

Kaitlin N. Smith, Tim LaFave, Duncan L. MacFarlane, Mitchell A. Thornton

FLAP, 2018

Multiple-Valued Random Digit Extraction.

Micah Thornton, Mitchell A. Thornton

Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018

A Radix-4 Chrestenson Gate for Optical Quantum Computation.

Kaitlin N. Smith, Tim LaFave, Duncan L. MacFarlane, Mitchell A. Thornton

Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018

2017

Automated Markov-chain based analysis for large state spaces.

Kaitlin N. Smith, Michael A. Taylor, Anna A. Carroll, Theodore W. Manikas, Mitchell A. Thornton

Proceedings of the 2017 Annual IEEE International Systems Conference, 2017

Simulation of switching circuits using transfer functions.

David Kebo Houngninou, Mitchell A. Thornton

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Quantum Photonic TRNG with Dual Extractor.

Mitchell A. Thornton, Duncan L. MacFarlane

Proceedings of the Quantum Technology and Optimization Problems, 2017

2016

QMDDs: Efficient Quantum Function Representation and Manipulation.

Philipp Niemann, Robert Wille, D. Michael Miller, Mitchell A. Thornton, Rolf Drechsler

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

A Fixed-Point Squaring Algorithm Using an Implicit Arbitrary Radix Number System.

Saurabh D. Gupta, Mitchell A. Thornton

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Reliability block diagram extensions for non-parametric probabilistic analysis.

Philip C. Davis, Mitchell A. Thornton, Theodore W. Manikas

Proceedings of the Annual IEEE Systems Conference, 2016

Implementation of switching circuit models as transfer functions.

David Kebo Houngninou, Mitchell A. Thornton

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Demographic Group Prediction Based on Smart Device User Recognition Gestures.

Adel R. Alharbi, Mitchell A. Thornton

Proceedings of the 15th IEEE International Conference on Machine Learning and Applications, 2016

2015

Simulation and Implication Using a Transfer Function Model for Switching Logic.

Mitchell A. Thornton

IEEE Trans. Computers, 2015

Modeling System Threat Probabilities Using Mixed-Radix Multiple-Valued Logic Decision Diagrams.

Theodore W. Manikas, Mitchell A. Thornton, David Y. Feinstein

J. Multiple Valued Log. Soft Comput., 2015

Quantum Multiple-Valued Decision Diagrams Containing Skipped Variables.

David Y. Feinstein, Mitchell A. Thornton

J. Multiple Valued Log. Soft Comput., 2015

Edge Reduction for EVMDDs to Speed Up Analysis of Multi-state Systems.

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas

Proceedings of the 2015 IEEE International Symposium on Multiple-Valued Logic, 2015

Demographic Group Classification of Smart Device Users.

Adel R. Alharbi, Mitchell A. Thornton

Proceedings of the 14th IEEE International Conference on Machine Learning and Applications, 2015

2014

Modeling Digital Switching Circuits with Linear Algebra

Mitchell A. Thornton

Synthesis Lectures on Digital Circuits and Systems, Morgan & Claypool Publishers, ISBN: 978-3-031-79867-2, 2014

Clock Distribution Area Reduction Using a Multiple-Valued Clocking Approach.

Rohit P. Menon, Mitchell A. Thornton

J. Multiple Valued Log. Soft Comput., 2014

On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems.

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas

IEICE Trans. Inf. Syst., 2014

System Probability Distribution Modeling Using MDDs.

Mitchell A. Thornton, Theodore W. Manikas, Stephen A. Szygenda, Shinobu Nagayama

Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014

Analysis Methods of Multi-state Systems Partially Having Dependent Components Using Multiple-Valued Decision Diagrams.

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas

Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014

Setting the stage for CE2016: A revised body of knowledge.

Eric Durant, John Impagliazzo, Susan Conry, Robert B. Reese, Mitchell A. Thornton, Herman Lam, Victor P. Nelson

Proceedings of the IEEE Frontiers in Education Conference, 2014

2013

Low power floating-point multiplication and squaring units with shared circuitry.

Jason Moore, Mitchell A. Thornton, David W. Matula

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Spectral Response of Ternary Logic Netlists.

Mitchell A. Thornton, Theodore W. Manikas

Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

Ternary Logic Network Justification Using Transfer Matrices.

Mitchell A. Thornton, Jennifer Dworak

Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

A Transfer Function Model for Ternary Switching Logic Circuits.

Mitchell A. Thornton

Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

Embedded and real-time systems classes in traditional and distance education format.

Mitchell A. Thornton, Theodore W. Manikas, Phillip A. Laplante

Proceedings of the IEEE Frontiers in Education Conference, 2013

Computer engineering curriculum guidelines.

Eric Durant, John Impagliazzo, Susan Conry, Andrew D. McGettrick, Mitchell A. Thornton, Timothy Wilson

Proceedings of the IEEE Frontiers in Education Conference, 2013

2012

Reversible Logic Synthesis Based on Decision Diagram Variable Ordering.

David Y. Feinstein, Mitchell A. Thornton

J. Multiple Valued Log. Soft Comput., 2012

Professional Licensure for Software Engineers: An Update.

Mitchell A. Thornton

Comput. Sci. Eng., 2012

Computer engineering review task force report.

John Impagliazzo, Susan Conry, Eric Durant, Andrew D. McGettrick, Mitchell A. Thornton, Timothy Wilson

Proceedings of the 43rd ACM technical symposium on Computer science education, 2012

Global Multiple-Valued Clock Approach for High- Performance Multi-phase Clock Integrated Circuits.

Rohit P. Menon, Mitchell A. Thornton

Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Modeling Medical System Threats with Conditional Probabilities Using Multiple-Valued Logic Decision Diagrams.

Theodore W. Manikas, David Y. Feinstein, Mitchell A. Thornton

Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Using the Asynchronous Paradigm for Reversible Sequential Circuit Implementation.

David Y. Feinstein, Mitchell A. Thornton

Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Uncle - An RTL Approach to Asynchronous Design.

Robert B. Reese, Scott C. Smith, Mitchell A. Thornton

Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

2011

Keyboard Dynamics.

Mitchell A. Thornton

Proceedings of the Encyclopedia of Cryptography and Security, 2nd Ed., 2011

Using Multiple-Valued Logic Decision Diagrams to Model System Threat Probabilities.

Theodore W. Manikas, Mitchell A. Thornton, David Y. Feinstein

Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011

On the Skipped Variables of Quantum Multiple-Valued Decision Diagrams.

David Y. Feinstein, Mitchell A. Thornton

Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011

2010

Digital System Verification: A Combined Formal Methods and Simulation Framework

Lun Li, Mitchell A. Thornton

Synthesis Lectures on Digital Circuits and Systems, Morgan & Claypool Publishers, ISBN: 978-3-031-79815-3, 2010

To PE or not to PE: the Sequel.

Steven F. Barrett, Mitchell A. Thornton

Comput. Sci. Eng., 2010

Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits.

Satyendra R. Datla, Mitchell A. Thornton

Proceedings of the 40th IEEE International Symposium on Multiple-Valued Logic, 2010

2009

A Discrete Logarithm Number System for Integer Arithmetic Modulo 2^k: Algorithms and Lookup Structures.

Alex Fit-Florea, Lun Li, Mitchell A. Thornton, David W. Matula

IEEE Trans. Computers, 2009

Minimization of Quantum Multiple-valued Decision Diagrams Using Data Structure Metrics.

David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller

J. Multiple Valued Log. Soft Comput., 2009

On the Guidance of Reversible Logic Synthesis by Dynamic Variable Reordering.

David Y. Feinstein, Mitchell A. Thornton

Proceedings of the ISMVL 2009, 2009

Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with SystemVerilog©.

Satyendra R. Datla, Mitchell A. Thornton, Luther Hendrix, Dave Henderson

Proceedings of the ISMVL 2009, 2009

A Low Power High Performance Radix-4 Approximate Squaring Circuit.

Satyendra R. Datla, Mitchell A. Thornton, David W. Matula

Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009

2008

Components of disaster-tolerant computing: analysis of disaster recovery, IT application downtime and executive visibility.

Chad M. Lawler, Michael A. Harper, Stephen A. Szygenda, Mitchell A. Thornton

Int. J. Bus. Inf. Syst., 2008

Quantum Logic Implementation of Unary Arithmetic Operations.

Mitchell A. Thornton, David W. Matula, Laura Spenner, D. Michael Miller

Proceedings of the 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 2008

On the Data Structure Metrics of Quantum Multiple-Valued Decision Diagrams.

David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller

Proceedings of the 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 2008

Partially Redundant Logic Detection Using Symbolic Equivalence Checking in Reversible and Irreversible Logic Circuits.

David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller

Proceedings of the Design, Automation and Test in Europe, 2008

A low power radix-4 dual recoded integer squaring implementation for use in design of application specific arithmetic circuits.

Jason Moore, Mitchell A. Thornton, David W. Matula

Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008

Multiple Valued Logic - Concepts and Representations.

D. Michael Miller, Mitchell Aaron Thornton

Synthesis lectures on digital circuits and systems 12, Morgan & Claypool Publishers, ISBN: 978-1-59829-190-2, 2008

2007

Multiple Valued Logic: Concepts and Representations

D. Michael Miller, Mitchell A. Thornton

Synthesis Lectures on Digital Circuits and Systems, Morgan & Claypool Publishers, ISBN: 978-3-031-79779-8, 2007

QMDD Minimization Using Sifting for Variable Reordering.

D. Michael Miller, David Y. Feinstein, Mitchell A. Thornton

J. Multiple Valued Log. Soft Comput., 2007

Variable Reordering and Sifting for QMDD.

D. Michael Miller, David Y. Feinstein, Mitchell A. Thornton

Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007

Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL.

Mahsan Amoui, Daniel Große, Mitchell A. Thornton, Rolf Drechsler

Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007

Components and Analysis of Disaster Tolerant Computing.

Chad M. Lawler, Michael A. Harper, Mitchell A. Thornton

Proceedings of the 26th IEEE International Performance Computing and Communications Conference, 2007

Advances in Quantum Computing Fault Tolerance and Testing.

David Y. Feinstein, V. S. S. Nair, Mitchell A. Thornton

Proceedings of the Tenth IEEE International Symposium on High Assurance Systems Engineering (HASE 2007), 2007

Automatic High Level Assertion Generation and Synthesis for Embedded System Design.

Lun Li, Frank P. Coyle, Mitchell A. Thornton

Proceedings of the Forum on specification and Design Languages, 2007

2006

Introduction to Logic Synthesis using Verilog HDL

Robert B. Reese, Mitchell A. Thornton

Synthesis Lectures on Digital Circuits and Systems, Morgan & Claypool Publishers, ISBN: 978-3-031-79743-9, 2006

QMDD: A Decision Diagram Structure for Reversible and Quantum Circuits.

D. Michael Miller, Mitchell A. Thornton

Proceedings of the 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 2006

A Quantum CAD Accelerator Based on Grover's Algorithm for Finding the Minimum Fixed Polarity Reed-Muller Form.

Lun Li, Mitchell A. Thornton, Marek A. Perkowski

Proceedings of the 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 2006

A digit serial algorithm for the integer power operation.

Lun Li, Mitchell A. Thornton, David W. Matula

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

A Decision Diagram Package for Reversible and Quantum Circuit Simulation.

D. Michael Miller, Mitchell A. Thornton, David Goodman

Proceedings of the IEEE International Conference on Evolutionary Computation, 2006

Performance Evaluation of a Novel Direct Table Lookup Method and Architecture with Application to 16-bit Integer Functions.

Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula

Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005

Early evaluation for performance enhancement in phased logic.

Robert B. Reese, Mitchell A. Thornton, Cherrice Traver, David Hemmendinger

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

A Coarse-Grain Phased Logic CPU.

Robert B. Reese, Mitchell A. Thornton, Cherrice Traver

IEEE Trans. Computers, 2005

A Framework and Process for Curricular Integration and Innovation Using Project Based Interdisciplinary Teams.

Frank P. Coyle, Mitchell A. Thornton

Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005

Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2^k.

Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula

Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

The Karhunen-Loève Transform of Discrete MVL Functions.

Mitchell A. Thornton

Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 2005

Table Lookup Structures for Multiplicative Inverses Modulo 2^k.

David W. Matula, Alex Fit-Florea, Mitchell Aaron Thornton

Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005

2004

Computation of Discrete Function Chrestenson Spectrum Using Cayley Color Graphs.

Mitchell A. Thornton, D. Michael Miller

J. Multiple Valued Log. Soft Comput., 2004

A Genetic Approach for Conjunction Scheduling in Symbolic Equivalence Checking.

Lun Li, Mitchell A. Thornton, Stephen A. Szygenda

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Test vector generation and classification using FSM traversals.

Ralph Marczynski, Mitchell A. Thornton, Stephen A. Szygenda

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Performance enhancement in phased logic circuits using automatic slack-matching buffer insertion.

Kenneth Fazel, Lun Li, Mitchell A. Thornton, Robert B. Reese, Cherrice Traver

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003

Performance Evaluation of a Parallel Decoupled Data Driven Multiprocessor.

Mitchell A. Thornton

Parallel Process. Lett., 2003

A signed binary addition circuit based on an alternative class of addition tables.

Mitchell A. Thornton

Comput. Electr. Eng., 2003

A Fine-Grain Phased Logic CPU.

Robert B. Reese, Mitchell A. Thornton, Cherrice Traver

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Spectral Transforms of Mixed-radix MVL Functions.

Mitchell A. Thornton

Proceedings of the 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 2003

PLFire: A Visualization Tool for Asynchronous Phased Logic Designs.

Kenneth Fazel, Mitchell A. Thornton, Robert B. Reese

Proceedings of the 2003 Design, 2003

2002

Logic Circuit Equivalence Checking Using Haar Spectral Coefficients and Partial BDDs.

Mitchell A. Thornton, Rolf Drechsler, Wolfgang Günther

VLSI Design, 2002

On-line Error Detection in a Carry-free Adder.

Whitney J. Townsend, Mitchell A. Thornton, Parag K. Lala

Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Low Power Optimization Techniques for BDD Mapped Finite State Machines.

Mikael Kerttu, Per Lindgren, Rolf Drechsler, Mitchell A. Thornton

Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Multi-Output Timed Shannon Circuits.

Mitchell A. Thornton, Rolf Drechsler, D. Michael Miller

Proceedings of the 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 2002

Efficient Adder Circuits Based on a Conservative Reversible Logic Gate.

Jerry W. Bruce, Mitchell A. Thornton, L. Shivakumaraiah, P. S. Kokate, X. Li

Proceedings of the 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 2002

Chrestenson Spectrum Computation Using Cayley Color Graphs.

Mitchell A. Thornton, D. Michael Miller, Whitney J. Townsend

Proceedings of the 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), 2002

Switching activity estimation of finite state machines for low power synthesis.

Mikael Kerttu, Per Lindgren, Mitchell A. Thornton, Rolf Drechsler

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Computing walsh, arithmetic, and reed-muller spectral decision diagrams using graph transformations.

Whitney J. Townsend, Mitchell A. Thornton, Rolf Drechsler, D. Michael Miller

Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002

Generalized Early Evaluation in Self-Timed Circuits.

Mitchell A. Thornton, Kenneth Fazel, Robert B. Reese, Cherrice Traver

Proceedings of the 2002 Design, 2002

2001

Arithmetic Logic Circuits Using Self-Timed Bit Level Dataflow and Early Evaluation.

Robert B. Reese, Mitchell A. Thornton, Cherrice Traver

Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

Spectral decision diagrams using graph transformations.

Mitchell A. Thornton, Rolf Drechsler

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Low power optimization technique for BDD mapped circuits.

Per Lindgren, Mikael Kerttu, Mitchell A. Thornton, Rolf Drechsler

Proceedings of ASP-DAC 2001, 2001

Spectral techniques in VLSI CAD.

Mitchell Aaron Thornton, Rolf Drechsler, D. Michael Miller

Kluwer, ISBN: 978-0-7923-7433-6, 2001

2000

Boolean function representation and spectral characterization using AND/OR graphs.

A. Zuzek, Rolf Drechsler, Mitchell A. Thornton

Integr., 2000

Cache Resident Data Locality Analysis.

Q. G. Samdani, Mitchell A. Thornton

Proceedings of the MASCOTS 2000, Proceedings of the 8th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 29 August, 2000

A Method for Approximate Equivalence Checking.

Mitchell A. Thornton, Rolf Drechsler, Wolfgang Günther

Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000

MDD-Based Synthesis of Multi-Valued Logic Networks.

Rolf Drechsler, Mitchell A. Thornton, David Wessels

Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000

Computation of Spectral Information from Logic Netlists.

Rolf Drechsler, Mitchell A. Thornton

Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000

1999

Behavioral synthesis of combinational logic using spectral-based heuristics.

Mitchell A. Thornton, V. S. S. Nair

ACM Trans. Design Autom. Electr. Syst., 1999

Variable Reordering for Shared Binary Decision Diagrams Using Output Probabilities.

Mitchell A. Thornton, J. P. Williams, Rolf Drechsler, Nicole Drechsler

Proceedings of the 1999 Design, 1999

1998

Integration of CAD tools and structured design principles in an undergraduate computer engineering curriculum.

David L. Andrews, Mitchell A. Thornton

Proceedings of the 1998 workshop on Computer architecture education, 1998

1997

Signed Binary Addition Circuitry with Inherent Even Parity Outputs.

Mitchell A. Thornton

IEEE Trans. Computers, 1997

Graph Analysis and Transformation Techniques for Runtime Minimization in Multi-Threaded Architectures.

Mitchell A. Thornton, David L. Andrews

Proceedings of the 30th Annual Hawaii International Conference on System Sciences (HICSS-30), 1997

1995

Efficient calculation of spectral coefficients and their applications.

Mitchell A. Thornton, V. S. S. Nair

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

1993

An iterative combinational logic synthesis technique using spectral information.

Mitchell A. Thornton, V. S. S. Nair

Proceedings of the European Design Automation Conference 1993, 1993