Nuno Neves

According to our database, Nuno Neves authored at least 32 papers between 2013 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

EPAC: The Last Dance.

Filippo Mantovani, Fabio Banchelli, Pablo Vizcaino, Roger Ferrer, Oscar Palomar, Francesco Minervini, Jesús Labarta, Mauro Olivieri, Sebastiano Pomata, Pedro Marcuello, Jordi Cortina, Alberto Moreno, Josep Sans, Roger Espasa, Vassilis Papaefstathiou, Nikolaos Dimou, Georgios Ieronymakis, Antonis Psathakis, Michalis Giaourtas, Iasonas Mastorakis, Manolis Marazakis, Eric Guthmuller, Andrea Bocco, Jérôme Fereyre, César Fuguet, Mate Kovac, Mario Kovac, Luka Mrkovic, Josip Ramljak, Luca Bertaccini, Tim Fischer, Frank K. Gürkaynak, Paul Scheffler, Luca Benini, Bhavishya Goel, Madhavan Manivannan, Tiago Rocha, Nuno Neves, Jens Krueger

CoRR, April, 2026

Reconfigurable FPU With Precision Auto-Tuning for Next-Generation Transprecision Computing.

Guilherme Dias, Luís Crespo, Timo Schlachter, Marc Andre Heller, Jens Krüger, Pedro Tomás, Nuno Roma, Nuno Neves

IEEE Trans. Circuits Syst. I Regul. Pap., March, 2026

Real-Time ORB Accelerator for Embedded FPGA-Based SoCs With ROS Integration.

Andre Costa, José Duarte Lopes, Pedro Tomás, Nuno Roma, Nuno Neves

IEEE Trans. Very Large Scale Integr. Syst., January, 2026

S2VEC: Compiler-Driven Stream Specialization for Linearized Vectorization.

Luís Crespo, Ana Fernandes, Gabriel Falcão, Pedro Tomás, Nuno Roma, Nuno Neves

Proceedings of the 40th ACM International Conference on Supercomputing, 2026

2025

A Survey on Stream-Based Architectures: From Accelerators to CPUs.

Luís Crespo, Nuno Neves, Pedro Tomás, Nuno Roma

Proc. IEEE, August, 2025

Functional Validation of the RISC-V Unlimited Vector Extension.

Ana Fernandes, Luís Crespo, Nuno Neves, Pedro Tomás, Nuno Roma, Gabriel Falcão

IEEE Embed. Syst. Lett., February, 2025

Advancing the RISC-V Performance Simulation Ecosystem with Data Prefetching.

Luís Crespo, Nuno Neves, Pedro Tomás, Nuno Roma

Proceedings of the High Performance Computing, 2025

RISC-V in HPC: a Look Into Tools for Performance Monitoring.

Fabio Banchelli, Rafel Albert Bros Esqueu, Tiago Rocha, Nuno Roma, Pedro Tomás, Nuno Neves, Filippo Mantovani

Proceedings of the High Performance Computing, 2025

MIDAS: A Mapping Infrastructure for Configurable, Data-Streaming Based Domain Specific Accelerators.

Martim Bento, Nuno Neves, Pedro Tomás, Nuno Roma

Proceedings of the 37th IEEE/SBC International Symposium on Computer Architecture and High Performance Computing, 2025

Dynamic Reconfigurable FPU for Next-Generation Transprecision Computing.

Guilherme Dias, Luís Crespo, Pedro Tomás, Nuno Roma, Nuno Neves

Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025

Stream-Driven Acceleration for Embedded RISC-V SoCs.

João Maia, Ana Silveira, Gonçalo Midões, Nuno Neves, Pedro Tomás, Nuno Roma

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Real-Time ORB Accelerator with ROS Integration for Embedded FPGA SoCs.

Andre Costa, Pedro Tomás, Nuno Roma, Nuno Neves

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

RVEBS: Event-Based Sampling on RISC-V.

Tiago Rocha, Nuno Neves, Nuno Roma, Pedro Tomás, Leonel Sousa

Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024

Visual-Inertial Odometry for Metric-Scale Mapping of Underwater Caves.

Arthur Lago, Nuno Neves, Rodrigo Ventura, José Gaspar

Proceedings of the IEEE International Conference on Autonomous Robot Systems and Competitions, 2024

2023

Trading Performance, Power, and Area on Low-Precision Posit MAC Units for CNN Training.

Luís Crespo, Pedro Tomás, Nuno Roma, Nuno Neves

Proceedings of the 35th IEEE International Symposium on Computer Architecture and High Performance Computing, 2023

Supporting RISC-V Performance Counters Through Linux Performance Analysis Tools.

Joao Mario Domingos, Tiago Rocha, Nuno Neves, Nuno Roma, Pedro Tomás, Leonel Sousa

Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

2022

Unified Posit/IEEE-754 Vector MAC Unit for Transprecision Computing.

Luís Crespo, Pedro Tomás, Nuno Roma, Nuno Neves

IEEE Trans. Circuits Syst. II Express Briefs, 2022

Compiling for Vector Extensions With Stream-Based Specialization.

Nuno Neves, Joao Mario Domingos, Nuno Roma, Pedro Tomás, Gabriel Falcão

IEEE Micro, 2022

2021

A Reconfigurable Posit Tensor Unit with Variable-Precision Arithmetic and Automatic Data Streaming.

Nuno Neves, Pedro Tomás, Nuno Roma

J. Signal Process. Syst., 2021

Compiler-Assisted Data Streaming for Regular Code Structures.

Nuno Neves, Pedro Tomás, Nuno Roma

IEEE Trans. Computers, 2021

Unlimited Vector Extension with Data Streaming Support.

Joao Mario Domingos, Nuno Neves, Nuno Roma, Pedro Tomás

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

HEDAcc: FPGA-based Accelerator for High-order Epistasis Detection.

Gaspar Ribeiro, Nuno Neves, Sergio Santander-Jiménez, Aleksandar Ilic

Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

2020

Dynamic Fused Multiply-Accumulate Posit Unit with Variable Exponent Size for Low-Precision DSP Applications.

Nuno Neves, Pedro Tomás, Nuno Roma

Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

Reconfigurable Stream-based Tensor Unit with Variable-Precision Posit Arithmetic.

Nuno Neves, Pedro Tomás, Nuno Roma

Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020

2018

Stream data prefetcher for the GPU memory interface.

Nuno Neves, Pedro Tomás, Nuno Roma

J. Supercomput., 2018

2017

Adaptive In-Cache Streaming for Efficient Data Management.

Nuno Neves, Pedro Tomás, Nuno Roma

IEEE Trans. Very Large Scale Integr. Syst., 2017

2016

Multi-objective kernel mapping and scheduling for morphable many-core architectures.

Nuno Neves, Rui Neves, Nuno Horta, Pedro Tomás, Nuno Roma

Expert Syst. Appl., 2016

In-Cache Streaming: Morphable Infrastructure for Many-Core Processing Systems.

Nuno Neves, Adrien Mussio, Fabien Gonçalves, Pedro Tomás, Nuno Roma

Proceedings of the Euro-Par 2016: Parallel Processing Workshops, 2016

2015

Multicore SIMD ASIP for Next-Generation Sequencing and Alignment Biochip Platforms.

Nuno Neves, Nuno Sebastião, David Martins de Matos, Pedro Tomás, Paulo F. Flores, Nuno Roma

IEEE Trans. Very Large Scale Integr. Syst., 2015

Morphable hundred-core heterogeneous architecture for energy-aware computation.

Nuno Neves, Henrique Mendes, Ricardo Chaves, Pedro Tomás, Nuno Roma

IET Comput. Digit. Tech., 2015

Efficient data-stream management for shared-memory many-core systems.

Nuno Neves, Pedro Tomás, Nuno Roma

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2013

BioBlaze: Multi-core SIMD ASIP for DNA sequence alignment.

Nuno Neves, Nuno Sebastião, Andre Patricio, David Martins de Matos, Pedro Tomás, Paulo F. Flores, Nuno Roma

Proceedings of the 24th International Conference on Application-Specific Systems, 2013