According to our database1, Mario Kovac authored at least 23 papers between 1992 and 2019.
Legend:Book In proceedings Article PhD thesis Other
Proceedings of the Parallel Processing and Applied Mathematics, 2019
Proceedings of the 42nd International Convention on Information and Communication Technology, 2019
European processor initiative: the industrial cornerstone of EuroHPC for exascale era.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
Exploring manycore architectures for next-generation HPC systems through the MANGO approach.
Microprocess. Microsystems, 2018
Online efficient bio-medical video transcoding on MPSoCs through content-aware workload allocation.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
Deeply Heterogeneous Many-Accelerator Infrastructure for HPC Architecture Exploration.
Proceedings of the Parallel Computing is Everywhere, 2017
Proceedings of the Euromicro Conference on Digital System Design, 2017
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the IEEE Global Engineering Education Conference, 2015
Proceedings of the 18th IEEE International Conference on Computational Science and Engineering, 2015
Proceedings of the 2014 Embedded Engineering Learning Platform Workshop, 2014
Proceedings of the 2014 IEEE Global Engineering Education Conference, 2014
Power consumption and bandwidth savings with video transcoding to mobile device-specific spatial resolution.
Proceedings of the 9th International Symposium on Communication Systems, 2014
Application of Dynamically Reconfigurable Processors in Digital Signal Processing.
Proceedings of the SIGMAP 2006, 2006
Proceedings of the 1998 Design, 1998
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995
Proceedings of the 1995 European Design and Test Conference, 1995
Proceedings of the Seventh International Conference on VLSI Design, 1994
SIGMA: a VLSI systolic array implementation of a Galois field GF(2 <sup>m</sup>) based multiplication and division algorithm.
IEEE Trans. Very Large Scale Integr. Syst., 1993
SIGMA: A VLSI Chip for Galois Field GF(2<sup>m</sup>) Based Multiplication and Division.
Proceedings of the Sixth International Conference on VLSI Design, 1993
Proceedings of the 6th International Parallel Processing Symposium, 1992