Pablo García Del Valle

According to our database, Pablo García Del Valle authored at least 14 papers between 2006 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2017

Joint Computing and Electric Systems Optimization for Green Datacenters.

Ali Pahlevan, Maurizio Rossi, Pablo García Del Valle, Davide Brunelli, David Atienza

Proceedings of the Handbook of Hardware/Software Codesign., 2017

2016

Inexact-aware architecture design for ultra-low power bio-signal analysis.

Soumya Basu, Pablo García Del Valle, Georgios Karakonstantis, Giovanni Ansaloni, Laura Pozzi, David Atienza

IET Comput. Digit. Tech., 2016

Exploiting CPU-load and data correlations in multi-objective VM placement for geo-distributed data centers.

Ali Pahlevan, Pablo García Del Valle, David Atienza

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Towards near-threshold server processors.

Ali Pahlevan, Javier Picorel, Arash Pourhabibi Zarandi, Davide Rossi, Marina Zapater, Andrea Bartolini, Pablo García Del Valle, David Atienza, Luca Benini, Babak Falsafi

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Energy vs. reliability trade-offs exploration in biomedical ultra-low power devices.

Loris Duch, Pablo García Del Valle, Shrikanth Ganapathy, Andreas Burg, David Atienza

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Heterogeneous Error-Resilient Scheme for Spectral Analysis in Ultra-Low Power Wearable Electrocardiogram Devices.

Soumya Basu, Pablo García Del Valle, Georgios Karakonstantis, Giovanni Ansaloni, David Atienza

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

2013

Accurate Human Tissue Characterization for Energy-Efficient Wireless On-Body Communications.

Mónica Vallejo, Joaquín Recas, Pablo García Del Valle, José L. Ayala

Sensors, 2013

2011

Emulation-based transient thermal modeling of 2D/3D systems-on-chip with active cooling.

Pablo García Del Valle, David Atienza

Microelectron. J., 2011

2010

Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs.

Mohamed M. Sabry, Martino Ruggiero, Pablo García Del Valle

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

2008

Reliability-aware design for nanometer-scale devices.

David Atienza, Giovanni De Micheli, Luca Benini, José L. Ayala, Pablo García Del Valle, Michael DeBole, Vijaykrishnan Narayanan

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

HW-SW emulation framework for temperature-aware design in MPSoCs.

David Atienza, Pablo García Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida

ACM Trans. Design Autom. Electr. Syst., 2007

Multi-processor operating system emulation framework with thermal feedback for systems-on-chip.

Salvatore Carta, Andrea Acquaviva, Pablo García Del Valle, David Atienza, Giovanni De Micheli, Fernando Rincón, Luca Benini, Jose Manuel Mendias

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

2006

A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework.

Pablo García Del Valle, David Atienza, Ivan Magan, Javier Garcia Flores, Esther Andres Perez, Jose Manuel Mendias, Luca Benini, Giovanni De Micheli

Proceedings of the IFIP VLSI-SoC 2006, 2006

A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip.

David Atienza, Pablo García Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias

Proceedings of the 43rd Design Automation Conference, 2006