Po-Chun Chien

According to our database, Po-Chun Chien authored at least 10 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Augmenting Interpolation-Based Model Checking with Auxiliary Invariants (Extended Version).

Dirk Beyer, Po-Chun Chien, Nian-Ze Lee

CoRR, 2024

CPV: A Circuit-Based Program Verifier.

Po-Chun Chien, Nian-Ze Lee

Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2024

CPAchecker 2.3 with Strategy Selection - (Competition Contribution).

Daniel Baier, Dirk Beyer, Po-Chun Chien, Marek Jankola, Matthias Kettl, Nian-Ze Lee, Thomas Lemberger, Marian Lingsch Rosenfeld, Martin Spiessl, Henrik Wachowitz, Philipp Wendler

Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2024

Btor2-Cert: A Certifying Hardware-Verification Framework Using Software Analyzers.

Zsófia Ádám, Dirk Beyer, Po-Chun Chien, Nian-Ze Lee, Nils Sirrenberg

Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2024

2023

Bridging Hardware and Software Analysis with Btor2C: A Word-Level-Circuit-to-C Translator.

Dirk Beyer, Po-Chun Chien, Nian-Ze Lee

Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2023

CPA-DF: A Tool for Configurable Interval Analysis to Boost Program Verification.

Dirk Beyer, Po-Chun Chien, Nian-Ze Lee

Proceedings of the 38th IEEE/ACM International Conference on Automated Software Engineering, 2023

2021

Compatible Equivalence Checking of X-Valued Circuits.

Yu-Neng Wang, Yun-Rong Luo, Po-Chun Chien, Ping-Lun Wang, Hao-Ren Wang, Wan-Hsuan Lin, Jie-Hong Roland Jiang, Chung-Yang (Ric) Huang

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization.

Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jônata Tyska Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Time Multiplexing via Circuit Folding.

Po-Chun Chien, Jie-Hong R. Jiang

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Time-Frame Folding: Back to the Sequentiality.

Po-Chun Chien, Jie-Hong R. Jiang

Proceedings of the International Conference on Computer-Aided Design, 2019