Rasit Onur Topaloglu
Orcid: 0000-0001-8759-6959Affiliations:
- IBM
According to our database1,
Rasit Onur Topaloglu
authored at least 57 papers
between 2004 and 2023.
Collaborative distances:
Collaborative distances:
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on dl.acm.org
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Bibliography
2023
Florets for Chiplets: Data Flow-aware High-Performance and Energy-efficient Network-on-Interposer for CNN Inference Tasks.
ACM Trans. Embed. Comput. Syst., October, 2023
Integr., March, 2023
2022
IEEE Access, 2022
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
Quantum Machine Learning for Material Synthesis and Hardware Security (Invited Paper).
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
Muzzle the Shuttle: Efficient Compilation for Multi-Trap Trapped-Ion Quantum Computers.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021
Proceedings of the HASP '21: Workshop on Hardware and Architectural Support for Security and Privacy, 2021
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Quantum-Classical Hybrid Machine Learning for Image Classification (ICCAD Special Session Paper).
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Sampling-Based Approximate Logic Synthesis: An Explainable Machine Learning Approach.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the 26th IEEE European Test Symposium, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2018
Editorial for TODAES Special Issue on Internet of Things System Performance, Reliability, and Security.
ACM Trans. Design Autom. Electr. Syst., 2018
Proceedings of the 2018 International Symposium on VLSI Design, 2018
2017
ACM J. Emerg. Technol. Comput. Syst., 2017
2016
ICCAD-2016 CAD contest in pattern classification for integrated circuit design space analysis and benchmark suite.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
ICCAD-2014 CAD contest in design for manufacturability flow for advanced semiconductor nodes and benchmark suite.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
2013
Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction, 2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Self-aligned double patterning decomposition for overlay minimization and hot spot detection.
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 48th Design Automation Conference, 2011
2010
3-2-1 contact: an experimental approach to the analysisof contacts in 45 nm and below.
Proceedings of the International Workshop on System Level Interconnect Prediction Workshop, 2010
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
2009
Proceedings of the 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), 2009
CAD utilities to comprehend layout-dependent stress effects in 45 nm high- performance SOI custom macro design.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
2008
Characterization, modeling and optimization of fills and stress in semiconductor integrated circuits.
PhD thesis, 2008
Chip Optimization Through STI-Stress-Aware Placement Perturbations and Fill Insertion.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Process Variation Characterization and Modeling of Nanoparticle Interconnects for Foldable Electronics.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
2007
Process Variation-Aware Multiple-Fault Diagnosis of Thermometer-Coded Current-Steering DACs.
IEEE Trans. Circuits Syst. II Express Briefs, 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Standard Cell and Custom Circuit Optimization using Dummy Diffusions through STI Width Stress Effect Utilization.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2006
Early, Accurate and Fast Yield Estimation through Monte Carlo-Alternative Probabilistic Behavioral Analog System Simulations.
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
Proceedings of the Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Interconnect Matching Design Rule Inferring and Optimization through Correlation Extraction.
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
2005
A DFT approach for diagnosis and process variation-aware structural test of thermometer coded current steering DACs.
Proceedings of the 42nd Design Automation Conference, 2005
Forward discrete probability propagation method for device performance characterization under process variations.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004