Prabhat Avasare

According to our database1, Prabhat Avasare authored at least 22 papers between 1999 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
HUNBN, a 16-nm Digital In-Memory-Compute SoC for Edge CNN Application Achieving 24 TOPs/W (4b) at System Level.
IEEE J. Solid State Circuits, July, 2025

2013
Design Flow for Silicon Chip Implementing Novel Platform Architecture for Wireless Communication.
Int. J. Embed. Real Time Commun. Syst., 2013

Tutorial T1B: Riding the "Energy Consumption Horse" - from System-level Design to Silicon.
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

2012
DART - a High Level Software-Defined Radio Platform Model for Developing the Run-Time Controller.
J. Signal Process. Syst., 2012

Power Estimation at Different Abstraction Levels for Wireless Baseband Processors.
J. Low Power Electron., 2012

A flexible platform architecture for Gbps wireless communication.
Proceedings of the 2012 International Symposium on System on Chip, 2012

2011
Linking run-time resource management of embedded multi-core platforms with automated design-time exploration.
IET Comput. Digit. Tech., 2011


Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming.
Proceedings of the Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011

Design Space Exploration Supporting Run-Time Resource Management.
Proceedings of the Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011

2010

An industrial design space exploration framework for supporting run-time resource management on multi-core systems.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
MPA: Parallelizing an Application onto a Multicore Platform Made Easy.
IEEE Micro, 2009

2008
Run-Time Management of a MPSoC Containing FPGA Fabric Tiles.
IEEE Trans. Very Large Scale Integr. Syst., 2008

2007
Scalable, Wavelet-Based Video: From Server to Hardware-Accelerated Client.
IEEE Trans. Multim., 2007

2006
Exploiting Hierarchical Configuration to Improve Run-Time MPSoC Task Assignment.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006

2005
Centralized end-to-end flow control in a best-effort network-on-chip.
Proceedings of the EMSOFT 2005, 2005

Centralized Run-Time Resource Management in a Network-on-Chip Containing Reconfigurable Hardware Tiles.
Proceedings of the 2005 Design, 2005

Low Cost Task Migration Initiation in a Heterogeneous MP-SoC.
Proceedings of the 2005 Design, 2005

2004
Run-time support for heterogeneous multitasking on reconfigurable SoCs.
Integr., 2004

2002
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera.
Proceedings of the Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation, 2002

1999
Timed executable system specification of an ADSL modem using a C++ based design environment: a case study.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999


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