Pragnya Sudershan Nalla

According to our database, Pragnya Sudershan Nalla authored at least 4 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

HISIM: Analytical Performance Modeling and Design Space Exploration of 2.5D/3D Integration for AI Computing.

Zhenyu Wang, Pragnya Sudershan Nalla, Jingbo Sun, A. Alper Goksoy, Sumit K. Mandal, Jae-Sun Seo, Vidya A. Chhabria, Jeff Zhang, Chaitali Chakrabarti, Ümit Y. Ogras, Yu Cao

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2025

CLAIRE: Composable Chiplet Libraries for AI Inference.

Pragnya Sudershan Nalla, Emad Haque, Yaotian Liu, Sachin S. Sapatnekar, Jeff Zhang, Chaitali Chakrabarti, Yu Cao

Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024

SHIFFT: A Scalable Hybrid In-Memory Computing FFT Accelerator.

Pragnya Sudershan Nalla, Zhenyu Wang, Sapan Agarwal, T. Patrick Xiao, Christopher H. Bennett, Matthew J. Marinella, Jae-sun Seo, Yu Cao

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

2023

3D-ISC: A 65nm 3D Compatible In-Sensor Computing Accelerator with Reconfigurable Tile Architecture for Real-Time DVS Data Compression.

Gokul Krishnan, Gopikrishnan Raveendran Nair, Jonghyun Oh, Anupreetham Anupreetham, Pragnya Sudershan Nalla, Ahmed Hassan, Injune Yeo, Kishore Kasichainula, Jae-sun Seo, Mingoo Seok, Yu Cao

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023