Tejas Karkhanis

According to our database1, Tejas Karkhanis authored at least 12 papers between 2002 and 2015.

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Bibliography

2015
IBM POWER8 processor core microarchitecture.
IBM J. Res. Dev., 2015

Active Memory Cube: A processing-in-memory architecture for exascale systems.
IBM J. Res. Dev., 2015

2012
Accelerating business analytics applications.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

2011
IBM Power Architecture.
Proceedings of the Encyclopedia of Parallel Computing, 2011

2009
A mechanistic performance model for superscalar out-of-order processors.
ACM Trans. Comput. Syst., 2009

2007
A Top-Down Approach to Architecting CPI Component Performance Counters.
IEEE Micro, 2007

Automated design of application specific superscalar processors: an analytical approach.
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

2006
A performance counter architecture for computing accurate CPI components.
Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, 2006

2004
A First-Order Superscalar Processor Model.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

2003
Energy Efficient Co-Adaptive Instruction Fetch and Issue.
Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

2002
Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.
Proceedings of the Power-Aware Computer Systems, Second International Workshop, 2002

Saving energy with just in time instruction delivery.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002


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