Ravi Nair

According to our database1, Ravi Nair authored at least 35 papers between 1982 and 2021.

Collaborative distances:

Awards

IEEE Fellow

IEEE Fellow 1994, "For contributions to design automation for VLSI and microprocessor design.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
Tabular Transformers for Modeling Multivariate Time Series.
Proceedings of the IEEE International Conference on Acoustics, 2021

2019
FactSheets: Increasing trust in AI services through supplier's declarations of conformity.
IBM J. Res. Dev., 2019

2018
Increasing Trust in AI Services through Supplier's Declarations of Conformity.
CoRR, 2018

2017
Wildfire: Approximate synchronization of parameters in distributed deep learning.
IBM J. Res. Dev., 2017

2016
Near-Memory Data Services.
IEEE Micro, 2016

Approximate computing: Challenges and opportunities.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

2015
Evolution of Memory Architecture.
Proc. IEEE, 2015

Active Memory Cube: A processing-in-memory architecture for exascale systems.
IBM J. Res. Dev., 2015

Big data needs approximate computing: technical perspective.
Commun. ACM, 2015

Progressive Codesign of an Architecture and Compiler Using a Proxy Application.
Proceedings of the 27th International Symposium on Computer Architecture and High Performance Computing, 2015

Exploiting Fine- and Coarse-Grained Parallelism Using a Directive Based Approach.
Proceedings of the OpenMP: Heterogenous Execution and Data Movements, 2015

Data access optimization in a processing-in-memory system.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014
Near-Data Processing: Insights from a MICRO-46 Workshop.
IEEE Micro, 2014

2012
Towards flexible exascale stream processing system simulation.
Simul., 2012

Programming with relaxed synchronization.
Proceedings of the 2012 ACM workshop on Relaxing synchronization for multicore and manycore scalability, 2012

2011
Exascale Computing.
Proceedings of the Encyclopedia of Parallel Computing, 2011

2010
Flow: A Stream Processing System Simulator.
Proceedings of the 24th ACM/IEEE/SCS Workshop on Principles of Advanced and Distributed Simulation, 2010

Models for energy-efficient approximate computing.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

2009
Exascale computing: What future architectures will mean for the user community.
Proceedings of the Parallel Computing: From Multicores and GPU's to Petascale, 2009

2005
The Architecture of Virtual Machines.
Computer, 2005

Virtual machines - versatile platforms for systems and processes.
Elsevier, ISBN: 978-1-55860-910-5, 2005

2004
Constraint Graph Analysis of Multithreaded Programs.
J. Instr. Level Parallelism, 2004

2002
Effect of increasing chip density on the evolution of computer architectures.
IBM J. Res. Dev., 2002

1997
Exploiting Instruction Level Parallelism in Processors by Caching Scheduled Groups.
Proceedings of the 24th International Symposium on Computer Architecture, 1997

1996
Profiling IBM RS/6000 Applications.
Int. J. Comput. Simul., 1996

Profile-Driven Generation of Trace Samples.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

1995
Optimal 2-Bit Branch Predictors.
IEEE Trans. Computers, 1995

Dynamic path-based branch correlation.
Proceedings of the 28th Annual International Symposium on Microarchitecture, Ann Arbor, Michigan, USA, November 29, 1995

1993
Measuring limits of parallelism and characterizing its vulnerability to resource constraints.
Proceedings of the 26th Annual International Symposium on Microarchitecture, 1993

1991
Restructuring VLSI layout representations for efficiency.
Proceedings of the conference on European design automation, 1991

1989
Generation of performance constraints for layout.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

1988
Optimal CMOS cell transistor placement: a relaxation approach.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1987
A Ranking Algorithm for MOS Circuit Layouts.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987

A Simple Yet Effective Technique for Global Wiring.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987

1982
Global wiring on a wire routing machine.
Proceedings of the 19th Design Automation Conference, 1982


  Loading...