Toshitsugu Sakamoto

According to our database, Toshitsugu Sakamoto authored at least 22 papers between 2005 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Memory and Energy Savings in the FPGA Implementation of Keyword Spotting with Stream Processing.

Yuto Tada, Masanori Hashimoto, Makoto Miyamura, Xu Bai, Toshitsugu Sakamoto, Hiroyuki Ochi

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025

2022

28nm Atom-Switch FPGA: Static Timing Analysis and Evaluation.

Xu Bai, Ryusuke Nebashi, Makoto Miyamura, Kazunori Funahashi, Naoki Banno, Koichiro Okamoto, Hideaki Numata, Noriyuki Iguchi, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada

IEICE Trans. Electron., October, 2022

Via-Switch FPGA: 65-nm CMOS Implementation and Evaluation.

Xu Bai, Naoki Banno, Makoto Miyamura, Ryusuke Nebashi, Koichiro Okamoto, Hideaki Numata, Noriyuki Iguchi, Masanori Hashimoto, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada

IEEE J. Solid State Circuits, 2022

Enhanced Drain Current in Transient Mode due to Long Ionization Time of Shallow Impurities at 4 K in 65-nm bulk Cryo CMOS Transistors.

Tomohisa Miyao, Takahisa Tanaka, Itsuki Imanishi, Masayuki Ichikawa, Shuya Nakagawa, Hiroki Ishikuro, Toshitsugu Sakamoto, Munehiro Tada, Ken Uchida

Proceedings of the Device Research Conference, 2022

2020

A Fault Detection and Diagnosis Method for Via-Switch Crossbar in Non-Volatile FPGA.

Ryutaro Doi, Xu Bai, Toshitsugu Sakamoto, Masanori Hashimoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020

33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al Applications.

Masanori Hashimoto, Xu Bai, Naoki Banno, Munehiro Tada, Toshitsugu Sakamoto, Jaehoon Yu, Ryutaro Doi, Yusuke Araki, Hidetoshi Onodera, Takashi Imagawa, Hiroyuki Ochi, Kazutoshi Wakabayashi, Yukio Mitsuyama, Tadahiko Sugibayashi

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

ON-state retention of Atom Switch eNVM for IoT/AI Inference Solution.

Koichiro Okamoto, Ryusuke Nebashi, Naoki Banno, Xu Bai, Hideaki Numata, Noriyuki Iguchi, Makoto Miyamura, Hiromitsu Hada, Kazunori Funahashi, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

A 171k-LUT Nonvolatile FPGA using Cu Atom-Switch Technology in 28nm CMOS.

Ryusuke Nebashi, Naoki Banno, Makoto Miyamura, Xu Bai, Kazunori Funahashi, Koichiro Okamoto, Noriyuki Iguchi, Hideaki Numata, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Fault Diagnosis of Via-Switch Crossbar in Non-volatile FPGA.

Ryutaro Doi, Xu Bai, Toshitsugu Sakamoto, Masanori Hashimoto

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2018

Sensor Signal Processing Using High-Level Synthesis With a Layered Architecture.

Hiroki Hihara, Akira Iwasaki, Masanori Hashimoto, Hiroyuki Ochi, Yukio Mitsuyama, Hidetoshi Onodera, Hiroyuki Kanbara, Kazutoshi Wakabayashi, Tadahiko Sugibayashi, Takashi Takenaka, Hiromitsu Hada, Munehiro Tada, Makoto Miyamura, Toshitsugu Sakamoto

IEEE Embed. Syst. Lett., 2018

2017

NanoBridge-Based FPGA in High-Temperature Environments.

Makoto Miyamura, Toshitsugu Sakamoto, Xu Bai, Yukihide Tsuji, Ayuka Morioka, Ryusuke Nebashi, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada, Tadahiko Sugibayashi, Yuya Nagamatsu, Soichi Ookubo, Takuma Shirai, Fumihito Sugai, Masayuki Inaba

IEEE Micro, 2017

2016

A 2× logic density Programmable Logic array using atom switch fully implemented with logic transistors at 40nm-node and beyond.

Yukihide Tsuji, Xu Bai, Ayuka Morioka, Makoto Miyamura, Ryusuke Nebashi, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada, Tadahiko Sugibayashi

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015

A Silicon-on-Thin-Buried-Oxide CMOS Microcontroller with Embedded Atom-Switch ROM.

Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Hideki Makiyama, Takumi Hasegawa, Yoshiki Yamamoto, Shinobu Okanishi, Keiichi Maekawa, Naoki Banno, Makoto Miyamura, Koichiro Okamoto, Noriyuki Iguchi, Hidekazu Oda, Shiro Kamohara, Yasushi Yamagata, Nobuyuki Sugii, Hiromitsu Hada, Yasuhiro Ogasahara

IEEE Micro, 2015

Sub-μW standby power, <18 μW/DMIPS@25MHz MCU with embedded atom-switch programmable logic and ROM.

Yukihide Tsuji, Xu Bai, Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Nobuyuki Sugii, Hiromitsu Hada

Proceedings of the Symposium on VLSI Circuits, 2015

0.5-V Highly Power-Efficient Programmable Logic using Nonvolatile Configuration Switch in BEOL.

Makoto Miyamura, Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Architecture of Reconfigurable-Logic Cell Array with Atom Switch: Cluster Size & Routing Fabrics (Abstract Only).

Xu Bai, Yukihide Tsuji, Ayuka Morioka, Makoto Miyamura, Toshi Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

0.39-V, 18.26-µW/MHz SOTB CMOS Microcontroller with embedded atom switch ROM.

Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Hideki Makiyama, Takumi Hasegawa, Yoshiki Yamamoto, Shinobu Okanishi, Keiichi Maekawa, Naoki Banno, Makoto Miyamura, Koichiro Okamoto, Noriyuki Iguchi, Yasuhiro Ogasahara, Hidekazu Oda, Shiro Kamohara, Yasushi Yamagata, Nobuyuki Sugii, Hiromitsu Hada

Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015

2014

Low-power programmable-logic cell arrays using nonvolatile complementary atom switch.

Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2011

Programmable cell array using rewritable solid-electrolyte switch integrated in 90nm CMOS.

Makoto Miyamura, Shogo Nakaya, Munehiro Tada, Toshitsugu Sakamoto, Koichiro Okamoto, Naoki Banno, Shinji Ishida, Kimihiko Ito, Hiromitsu Hada, Noboru Sakimura, Tadahiko Sugibayashi, Masato Motomura

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2009

A chip-stacked memory for on-chip SRAM-rich SoCs and processors.

Hideaki Saito, Masayuki Nakajima, Takumi Okamoto, Yusuke Yamada, Akira Ohuchi, Noriyuki Iguchi, Toshitsugu Sakamoto, Koichi Yamaguchi, Masayuki Mizuno

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2006

Solid-Electrolyte Nanometer Switch.

Naoki Banno, Toshitsugu Sakamoto, Noriyuki Iguchi, Hisao Kawaura, Shunichi Kaeriyama, Masayuki Mizuno, Kazuya Terabe, Tsuyoshi Hasegawa, Masakazu Aono

IEICE Trans. Electron., 2006

2005

A nonvolatile programmable solid-electrolyte nanometer switch.

Shunichi Kaeriyama, Toshitsugu Sakamoto, Hiroshi Sunamura, Masayuki Mizuno, Hisao Kawaura, Tsuyoshi Hasegawa, Kazuya Terabe, Tomonobu Nakayama, Masakazu Aono

IEEE J. Solid State Circuits, 2005