Ryusuke Nebashi

According to our database1, Ryusuke Nebashi authored at least 16 papers between 2007 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
ON-state retention of Atom Switch eNVM for IoT/AI Inference Solution.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

A 171k-LUT Nonvolatile FPGA using Cu Atom-Switch Technology in 28nm CMOS.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

2017
NanoBridge-Based FPGA in High-Temperature Environments.
IEEE Micro, 2017

2016
Evaluation of Soft-Delay-Error Effects in Content-Addressable Memory.
J. Multiple Valued Log. Soft Comput., 2016

A 2× logic density Programmable Logic array using atom switch fully implemented with logic transistors at 40nm-node and beyond.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015
Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction.
IEEE J. Solid State Circuits, 2015

2014
Complementary 5T-4MTJ nonvolatile TCAM cell circuit with phase-selective parallel writing scheme.
IEICE Electron. Express, 2014

10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Soft-Delay-Error Evaluation in Content-Addressable Memory.
Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014

A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
High-speed simulator including accurate MTJ models for spintronics integrated circuit design.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2009
Nonvolatile Magnetic Flip-Flop for Standby-Power-Free SoCs.
IEEE J. Solid State Circuits, 2009

Shared Write-Selection Transistor Cell and Leakage-Replication Read Scheme for Large Capacity MRAM Macros.
IEICE Trans. Electron., 2009


2007
A 16-Mb Toggle MRAM With Burst Modes.
IEEE J. Solid State Circuits, 2007


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