Vijay Reddy

According to our database, Vijay Reddy authored at least 19 papers between 2004 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A Critical Examination of the TCAD Modeling of Hot Carrier Degradation for LDMOS Transistors.

Bikram Kishore Mahajan, Yen-Pu Chen, Muhammad Ashraful Alam, Dhanoop Varghese, Srikanth Krishnan, Vijay Reddy

Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021

Quantifying Region-Specific Hot Carrier Degradation in LDMOS Transistors Using a Novel Charge Pumping Technique.

Bikram Kishore Mahajan, Yen-Pu Chen, Dhanoop Varghese, Vijay Reddy, Srikanth Krishnan, Muhammad Ashraful Alam

Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020

A Novel 'I-V Spectroscopy' Technique to Deconvolve Threshold Voltage and Mobility Degradation in LDMOS Transistors.

Yen-Pu Chen, Bikram Kishore Mahajan, Dhanoop Varghese, Srikanth Krishnan, Vijay Reddy, Muhammad Ashraful Alam

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019

Investigating the Aging Dynamics of Diode-Connected MOS Devices Using an Array-Based Characterization Vehicle in a 65nm Process.

Nakul Pande, Gyusung Park, Chris H. Kim, Srikanth Krishnan, Vijay Reddy

Proceedings of the IEEE International Reliability Physics Symposium, 2019

2018

All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits.

Gyusung Park, Minsu Kim, Chris H. Kim, Bongjin Kim, Vijay Reddy

Proceedings of the IEEE International Reliability Physics Symposium, 2018

2016

Controlling Aging in Timing-Critical Paths.

Senthil Arasu, Mehrdad Nourani, John M. Carulli, Vijay Reddy

IEEE Des. Test, 2016

2014

Recovery modeling of negative bias temperature instability (NBTI) for SPICE-compatible circuit aging simulators.

Haldun Küflüoglu, Cathy Chancellor, Min Chen, Claude Cirba, Vijay Reddy

ACM J. Emerg. Technol. Comput. Syst., 2014

Reliability improvement of logic and clock paths in power-efficient designs.

Senthil Arasu, Mehrdad Nourani, Vijay Reddy, John M. Carulli Jr., Gautam Kapila, Min Chen

ACM J. Emerg. Technol. Comput. Syst., 2014

Asymmetric aging of clock networks in power efficient designs.

Senthil Arasu, Mehrdad Nourani, Frank Cano, John M. Carulli, Vijay Reddy

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2013

A design-for-reliability approach based on grading library cells for aging effects.

Senthil Arasu, Mehrdad Nourani, John M. Carulli, Kenneth M. Butler, Vijay Reddy

Proceedings of the 2013 IEEE International Test Conference, 2013

Performance entitlement by exploiting transistor's BTI recovery.

Senthil Arasu, Mehrdad Nourani, Vijay Reddy, John M. Carulli

Proceedings of the International Symposium on Quality Electronic Design, 2013

ACE: A robust variability and aging sensor for high-k/metal gate SoC.

Min Chen, Vijay Reddy, Srikanth Krishnan, Jay Ondrusek, Yu Cao

Proceedings of the European Solid-State Device Research Conference, 2013

2012

Asymmetric Aging and Workload Sensitive Bias Temperature Instability Sensors.

Min Chen, Vijay Reddy, Srikanth Krishnan, Venkatesh Srinivasan, Yu Cao

IEEE Des. Test Comput., 2012

2009

Circuit aging prediction for low-power operation.

Rui Zheng, Jyothi Velamala, Vijay Reddy, Varsha Balakrishnan, Evelyn Mintarno, Subhasish Mitra, Srikanth Krishnan, Yu Cao

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

Statistical prediction of circuit aging under process variations.

Wenping Wang, Vijay Reddy, Bo Yang, Varsha Balakrishnan, Srikanth Krishnan, Yu Cao

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

An Integrated Modeling Paradigm of Circuit Reliability for 65nm CMOS Technology.

Wenping Wang, Vijay Reddy, Anand T. Krishnan, Rakesh Vattikonda, Srikanth Krishnan, Yu Cao

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

Gate oxide failures due to anomalous stress from HBM ESD testers.

Charvaka Duvvury, Robert Steinhoff, Gianluca Boselli, Vijay Reddy, Hans Kunz, Steve Marum, Roger Cline

Microelectron. Reliab., 2006

2005

Impact of negative bias temperature instability on digital circuit reliability.

Vijay Reddy, Anand T. Krishnan, Andrew Marshall, John Rodriguez, Sreedhar Natarajan, Tim Rost, Srikanth Krishnan

Microelectron. Reliab., 2005

2004

Impact of Negative Bias Temperature Instability on Product Parametric Drift.

Vijay Reddy, John M. Carulli, Anand T. Krishnan, William Bosch, Brendan Burgess

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004