Chak-Kuen Wong

According to our database1, Chak-Kuen Wong
  • authored at least 198 papers between 1971 and 2014.
  • has a "Dijkstra number"2 of four.

Awards

ACM Fellow

ACM Fellow 1995, "For contributions to the theory of mass storage systems, to the analysis and design of computer algorithms, and to the design of VLSI circuits.".

Timeline

Legend:

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PhD thesis 
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Bibliography

2014
C1: an Automated Online Eduication Management System Based on an Object-Oriented Approach.
J. Web Eng., 2014

2010
Analysis of a nonlinear oscillator with discontinuity.
Computers & Mathematics with Applications, 2010

2008
Silicon oxynitride integrated waveguide for on-chip optical interconnects applications.
Microelectronics Reliability, 2008

The influence of solder volume and pad area on Sn-3.8Ag-0.7Cu and Ni UBM reaction in reflow soldering and isothermal aging.
Microelectronics Reliability, 2008

Trada: tree based ranking function adaptation.
Proceedings of the 17th ACM Conference on Information and Knowledge Management, 2008

2007
Silicon integrated photonics begins to revolutionize.
Microelectronics Reliability, 2007

2006
Minimizing hydrogen content in silicon oxynitride by thermal oxidation of silicon-rich silicon nitride.
Microelectronics Reliability, 2006

An FPGA-Based Electronic Cochlea with Dual Fixed-Point Arithmetic.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005
Immediate Data Authentication for Multicast in Resource Constrained Network.
Proceedings of the Information Security and Privacy, 10th Australasian Conference, 2005

2004
Approximation of Boolean Functions by Local Search.
Comp. Opt. and Appl., 2004

An FPGA-based Othello endgame solver.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

2003
Analysis of FPGA/FPIC switch modules.
ACM Trans. Design Autom. Electr. Syst., 2003

A Lane-Based Optimization Method for Minimizing Delay at Isolated Signal-Controlled Junctions.
J. Math. Model. Algorithms, 2003

Wafer Bonding Process Based On The Taguchi Analysis.
International Journal of Computational Engineering Science, 2003

A Novel Wafer-Level Packaging Solution For Mems.
International Journal of Computational Engineering Science, 2003

A Polymer-Based Optical Switch Fabricated Using Silicon Process, Electroplating And Micro Hot Embossing.
International Journal of Computational Engineering Science, 2003

An experimental analysis of local minima to improve neighbourhood search.
Computers & OR, 2003

Common gateway interfacing and dynamic jpeg techniques for remote handheld.
Proceedings of the CARS 2003. Computer Assisted Radiology and Surgery. Proceedings of the 17th International Congress and Exhibition, 2003

2002
Reduction design for generic universal switch blocks.
ACM Trans. Design Autom. Electr. Syst., 2002

The convergence of stochastic algorithms solving flow shop scheduling.
Theor. Comput. Sci., 2002

An automata network for performing combinatorial optimization.
Neurocomputing, 2002

An effective quasi-human based heuristic for solving the rectangle packing problem.
European Journal of Operational Research, 2002

Fast parallel heuristics for the job shop scheduling problem.
Computers & OR, 2002

Bounded-depth threshold circuits for computer-assisted CT image classification.
Artificial Intelligence in Medicine, 2002

A Simulated Annealing and Resampling Method for Training Perceptrons to Classify Gene-Expression Data.
Proceedings of the Artificial Neural Networks, 2002

2001
A new model of simulated evolutionary computation-convergence analysis and specifications.
IEEE Trans. Evolutionary Computation, 2001

A parallelized genetic algorithm for the calibration of Lowry model.
Parallel Computing, 2001

Combining the Perceptron Algorithm with Logarithmic Simulated Annealing.
Neural Processing Letters, 2001

On Fixed Edges and Edge-Reconstruction of Series-Parallel Networks.
Graphs and Combinatorics, 2001

Time-varying minimum cost flow problems.
European Journal of Operational Research, 2001

Steiner Trees in General Nonuniform Orientations.
Computing, 2001

The Kr-Packing Problem.
Computing, 2001

On the Convergence of Inhomogeneous Markov Chains Approximating Equilibrium Placements of Flexible Objects.
Comp. Opt. and Appl., 2001

Logarithmic simulated annealing for X-ray diagnosis.
Artificial Intelligence in Medicine, 2001

On the Signal Bounding Problem in Timing Analysis.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

A local search method for pattern classification.
Proceedings of the ESANN 2001, 2001

Liver tissue classification by bounded-depth threshold circuits.
Proceedings of the CARS 2001. Computer Assisted Radiology and Surgery. Proceedings of the 15th International Congress and Exhibition, 2001

Depth-Four Threshold Circuits for Computer-Assisted X-ray Diagnosis.
Proceedings of the Artificial Intelligence Medicine, 2001

2000
Simulated annealing-based algorithms for the studies of the thermoelastic scaling behavior.
IEEE Trans. Systems, Man, and Cybernetics, Part C, 2000

OBDD Minimization Based on Two-Level Representation of Boolean Functions.
IEEE Trans. Computers, 2000

Linear time-approximation algorithms for bin packing.
Oper. Res. Lett., 2000

Efficient Heuristics for Orientation Metric and Euclidean Steiner Tree Problems.
J. Comb. Optim., 2000

Decomposition of Graphs into (g, f)-Factors.
Graphs and Combinatorics, 2000

Rooted Spanning Trees in Tournaments.
Graphs and Combinatorics, 2000

Self-complementary graphs and Ramsey numbers Part I: the decomposition and construction of self-complementary graphs.
Discrete Mathematics, 2000

On the bounded domination number of tournaments.
Discrete Mathematics, 2000

Distributed Simulated Annealing for Job Shop Scheduling.
Proceedings of the Parallel Problem Solving from Nature, 2000

On Logarithmic Simulated Annealing.
Proceedings of the Theoretical Computer Science, 2000

Convergence Analysis of Simulated Annealing-Based Algorithms Solving Flow Shop Scheduling Problems.
Proceedings of the Algorithms and Complexity, 4th Italian Conference, 2000

Inhomogeneous Markov Chains Applied to Pattern Classification.
Proceedings of the International Symposium on Artificial Intelligence and Mathematics, 2000

1999
On k-ary spanning trees of tournaments.
Journal of Graph Theory, 1999

Two simulated annealing-based heuristics for the job shop scheduling problem.
European Journal of Operational Research, 1999

The strong Hall property and symmetric chain orders.
Discrete Mathematics, 1999

Foreword.
Algorithmica, 1999

1998
Floating Steiner Trees.
IEEE Trans. Computers, 1998

Minimum Fill-in on Circle and Circular-Arc Graphs.
J. Algorithms, 1998

Vertex Ranking of Asteroidal Triple-Free Graphs.
Inf. Process. Lett., 1998

On the optimal four-way switch box routing structures of FPGA greedy routing architectures1.
Integration, 1998

On avoidable and unavoidable claws.
Discrete Mathematics, 1998

The Vertex-Disjoint Triangles Problem.
Proceedings of the Graph-Theoretic Concepts in Computer Science, 1998

On Various Cooling Schedules for Simulated Annealing Applied to the Job Shop Problem.
Proceedings of the Randomization and Approximation Techniques in Computer Science, 1998

Optimal Placements of Flexible Objects: An Adaptive Simulated Annealing Approach.
Proceedings of the Parallel Problem Solving from Nature, 1998

On thin Boolean functions and related optimum OBDD ordering.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

On the Optimal Sub-routing Structures of 2-D FPGA Greedy Routing Architectures.
Proceedings of the ASP-DAC '98, 1998

1997
Routing for symmetric FPGAs and FPICs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1997

The Smallest Pair of Noncrossing Paths in a Rectilinear Polygon.
IEEE Trans. Computers, 1997

Optimal Placements of Flexible Objects: Part II: A Simulated Annealing Approach for the Bounded Case.
IEEE Trans. Computers, 1997

Optimal Placements of Flexible Objects: Part I: Analytical Results for the Unbounded Case.
IEEE Trans. Computers, 1997

Time-varying shortest path problems with constraints.
Networks, 1997

The Steiner Tree Problem in Orientation Metrics.
J. Comput. Syst. Sci., 1997

Finding Rectilinear Paths Among Obstacles in a Two-Layer Interconnection Model.
Int. J. Comput. Geometry Appl., 1997

Total variation image restoration: numerical methods and extensions.
Proceedings of the Proceedings 1997 International Conference on Image Processing, 1997

Optimal Placements of Flexible Objects: An Evolutionary Programming Approach.
Proceedings of the 7th International Conference on Genetic Algorithms, 1997

1996
Universal switch modules for FPGA design.
ACM Trans. Design Autom. Electr. Syst., 1996

A timing analysis algorithm for circuits with level-sensitive latches.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

Rectilinear Paths Among Rectilinear Obstacles.
Discrete Applied Mathematics, 1996

Shortest Path Problems with Time Constraints.
Proceedings of the Mathematical Foundations of Computer Science 1996, 1996

Vertex Ranking of Asteroidal Triple-Free Graphs.
Proceedings of the Algorithms and Computation, 7th International Symposium, 1996

Minimum Fill-In on Circle and Circular-Arc Graphs.
Proceedings of the Automata, Languages and Programming, 23rd International Colloquium, 1996

Universal Switch-Module Design for Symmetric-Array-Based FPGAs.
Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996

1995
Optimal net assignment.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

Rectilinear Path Problems among Rectilinear Obstacles Revisited.
SIAM J. Comput., 1995

Design and analysis of FPGA/FPIC switch modules.
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

FPGA global routing based on a new congestion metric.
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1994
Single-layer global routing.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994

A weighted Steiner tree-based global router with simultaneous length and density minimization.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994

On Bends and Distances of Paths Among Obstacles in Two-Layer Interconnection Model.
IEEE Trans. Computers, 1994

Process-variation-tolerant clock skew minimization.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

The reproducing placement problem with applications.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

A timing analysis algorithm for circuits with level-sensitive latches.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993
Determining the Shorest Process Migration Paths for Program Compilation Using a Dynamic Programming Approach.
Operating Systems Review, 1993

Routing for symmetric FPGAs and FPICs.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

On over-the-cell channel routing.
Proceedings of the European Design Automation Conference 1993, 1993

1992
Hierarchical Steiner tree construction in uniform orientations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1992

A performance-aimed cell compactor with automatic jogs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1992

Provably good performance-driven global routing.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1992

Bottleneck Steiner Trees in the Plane.
IEEE Trans. Computers, 1992

On bends and lengths of rectilinear paths: a graph theoretic approach.
Int. J. Comput. Geometry Appl., 1992

1991
Incremental time-slot assignment in SS/TDMA satellite systems.
IEEE Trans. Communications, 1991

Minimum Diameter Spanning Trees and Related Problems.
SIAM J. Comput., 1991

Planar topological routing of pad nets.
Integration, 1991

On Bends and Lengths of Rectilinear Paths: A Graph-Theoretic Approach.
Proceedings of the Algorithms and Data Structures, 1991

Performance-Driven Global Routing for Cell Based ICs.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1990
New algorithms for the rectilinear Steiner tree problem.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

Layer assignment for multichip modules.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

Pad minimization for planar routing of multiple power nets.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

Global routing based on Steiner min-max trees.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

1989
On VHV-routing in channels with irregular boundaries.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

Constructing the optimal rectilinear Steiner tree derivable from a minimum spanning tree.
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

A powerful global router: based on Steiner min-max trees.
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

A New Approach to the Rectilinear Steiner Tree Problem.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988
Maximizing pin alignment in semi-custom chip circuit layout.
Integration, 1988

1987
A Hierarchical Global Wiring Algorithm for Custom Chip Design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1987

Rectilinear Shortest Paths and Minimum Spanning Trees in the Presence of Rectilinear Obstacles.
IEEE Trans. Computers, 1987

Minimum-Area Wiring for Slicing Structures.
IEEE Trans. Computers, 1987

On Some Distance Problems in Fixed Orientations.
SIAM J. Comput., 1987

A note on visibility graphs.
Discrete Mathematics, 1987

1986
Minimum k-hamiltonian graphs, II.
Journal of Graph Theory, 1986

Faster Construction of Optimal Binary Split Trees.
J. Algorithms, 1986

On some union and intersection problems for polygons with fixed orientations.
Computing, 1986

A Faster Approximation Algorithm for the Steiner Problem in Graphs.
Acta Inf., 1986

Constructing Maximal Slicings from Geometry.
Acta Inf., 1986

Generating Binary Trees of Bounded Height.
Acta Inf., 1986

Hierarchial global wiring for custom chip design.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, June, 1986., 1986

1985
A Method for Improving Cascode-Switch Macro Wirability.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985

An Optimal Algorithm for the Maximum Alignment of Terminals.
Inf. Process. Lett., 1985

Distance problems in computational geometry with fixed orientations.
Proceedings of the First Annual Symposium on Computational Geometry, 1985

1984
Minimum K-hamiltonian graphs.
Journal of Graph Theory, 1984

Optimal Binary Split Trees.
J. Algorithms, 1984

Maximizing pin alignment by pin permutations.
Integration, 1984

Generalized Binary Split Trees.
Acta Inf., 1984

1983
(g 0, g 1, ... g k)-Trees and Unary OL Systems.
Theor. Comput. Sci., 1983

An Algorithm to Compact a VLSI Symbolic Layout with Mixed Constraints.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1983

Optimal Wiring of Movable Terminals.
IEEE Trans. Computers, 1983

Construction of Optimal alpha-beta Leaf Trees with Applications to Prefix Code and Information Retrieval.
SIAM J. Comput., 1983

Ranking and Unranking of B-Trees.
J. Algorithms, 1983

An algorithm for optimal two-dimensional compaction of VLSI layouts.
Integration, 1983

A "Zero-Time" VLSI Sorter.
IBM Journal of Research and Development, 1983

On the X-Y Convex Hull of a Set of X-Y Polygons.
BIT, 1983

Binary Search Trees with Limited Rotation.
BIT, 1983

An algorithm to compact a VLSI symbolic layout with mixed constraints.
Proceedings of the 20th Design Automation Conference, 1983

Algorithmic Studies in Mass Storage Systems.
Computer Science Press, 1983

1982
A conference key distribution system.
IEEE Trans. Information Theory, 1982

Ranking and Unranking of 2-3 Trees.
SIAM J. Comput., 1982

Analysis of a General Mass Storage System.
SIAM J. Comput., 1982

1981
Record Allocation for Minimizing Seek Delay.
Theor. Comput. Sci., 1981

An On-Chip Compare/Steer Bubble Sorter.
IEEE Trans. Computers, 1981

Tree Search in Major/Minor Loop Magnetic Bubble Memories.
IEEE Trans. Computers, 1981

Finding Intersection of Rectangles by Range Search.
J. Algorithms, 1981

A User Authentication Scheme for Shared Data Based on a Trap-Door One-Way Function.
Inf. Process. Lett., 1981

Communication: A Number Representation Convertor for Magnetic Bubble String Comparators.
IBM Journal of Research and Development, 1981

1980
Quintary Trees: A File Structure for Multidimensional Database Systems.
ACM Trans. Database Syst., 1980

Construction of a Generalized Connector with 5.8 n log2 n Edges.
IEEE Trans. Computers, 1980

A Tree Storage Scheme for Magnetic Bubble Memories.
IEEE Trans. Computers, 1980

On the Complexity of Sorting in Magnetic Bubble Memory Systems.
IEEE Trans. Computers, 1980

An Efficient Method for Weighted Sampling Without Replacement.
SIAM J. Comput., 1980

Voronoi Diagrams in L1 (Linfty) Metrics with 2-Dimensional Storage Applications.
SIAM J. Comput., 1980

Minimum Number of Steps for Permutation in a Bubble Memory.
Inf. Process. Lett., 1980

A New Permutation Algorithm for Bubble Memories.
Inf. Process. Lett., 1980

On the Complexity of Permuting Records in Magnetic Bubble Memory Systems.
IBM Journal of Research and Development, 1980

Minimizing Expected Head Movement in One-Dimensional and Two-Dimensional Mass Storage Systems.
ACM Comput. Surv., 1980

On Some Discrete Optimization Problems in Mass Storage Systems.
Proceedings of the Mathematical Foundations of Computer Science 1980 (MFCS'80), 1980

Magnetic Bubble Memory Structures for Efficient Sorting and Searching.
IFIP Congress, 1980

1979
Asymtotically Optimal Interconnection Networks from Two-State Cells.
IEEE Trans. Computers, 1979

The Movement and Permutation of Columns in Magnetic Bubble Lattice Files.
IEEE Trans. Computers, 1979

On the Number of Comparisons to Find the Intersection of Two Relations.
SIAM J. Comput., 1979

Optimal and Near-Optimal Scheduling Algorithms for Batched Processing in Linear Storage.
SIAM J. Comput., 1979

Upper and lower bounds for graph-diameter problems with application to record allocation.
J. Comb. Theory, Ser. B, 1979

1978
Dynamic Placement of Records in Linear Storage.
J. ACM, 1978

Bin Packing with Geometric Constraints in Computer Network Design.
Operations Research, 1978

Covering Edges by Cliques with Regard to Keyword Conflicts and Intersection Graphs.
Commun. ACM, 1978

Optimal alpha-beta Trees with Capacity Constraint.
Acta Inf., 1978

1977
Dynamic Memories with Faster Random and Sequential Access.
IBM Journal of Research and Development, 1977

Worst-Case Analysis for Region and Partial Region Searches in Multidimensional Binary Search Trees and Balanced Quad Trees.
Acta Inf., 1977

1976
Approximate Algorithms for Some Generalized Knapsack Problems.
Theor. Comput. Sci., 1976

The Generation of Permutations in Magnetic Bubble Memories.
IEEE Trans. Computers, 1976

Bounds for the String Editing Problem.
J. ACM, 1976

A Polynomial-Time Algorithm for the Knapsack Problem with Two Variables.
J. ACM, 1976

Data Organization in Magnetic Bubble Lattice Files.
IBM Journal of Research and Development, 1976

1975
Near-Optimal Solutions to a 2-Dimensional Placement Problem.
SIAM J. Comput., 1975

Worst-Case Analysis of a Placement Algorithm Related to Storage Allocation.
SIAM J. Comput., 1975

The Effect of a Capacity Constraint on the Minimal Cost of a Partition.
J. ACM, 1975

Storage cost considerations in secondary index selection.
International Journal of Parallel Programming, 1975

Near-optimal heuristics for an assignment problem in mass storage.
International Journal of Parallel Programming, 1975

A Note on the Set Basis Problem Related to the Compaction of Character Sets.
Commun. ACM, 1975

1974
Parallel Generation of Binary Search Trees.
IEEE Trans. Computers, 1974

A Combinatorial Problem Related to Multimodule Memory Organizations.
J. ACM, 1974

1973
The Anticipatory Control of a Cyclically Permutable Memory.
IEEE Trans. Computers, 1973

On the Optimality of the Probability Ranking Scheme in Storage Applications.
J. ACM, 1973

Upper Bounds for the Total Path Length of Binary Trees.
J. ACM, 1973

A Modified Branch-and-Bound Strategy.
Inf. Process. Lett., 1973

A majorization theorem for the number of distinct outcomes in n independent trials.
Discrete Mathematics, 1973

A drum scheduling algorithm.
Proceedings of the 1. Fachtagung über Automatentheorie und Formale Sprachen, 1973

1972
Reconstruction of patterns by block-projection.
Inf. Sci., 1972

Bounds on the Weighted Path Length of Binary Trees.
Inf. Process. Lett., 1972

Sorting by Natural Selection.
Commun. ACM, 1972

Bounds on Algorithms for String Generation.
Acta Inf., 1972

1971
On Binary Search Trees.
IFIP Congress (1), 1971


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