John V. Arthur

According to our database1, John V. Arthur authored at least 34 papers between 2005 and 2019.

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Bibliography

2019
TrueNorth: Accelerating From Zero to 64 Million Neurons in 10 Years.
Computer, 2019

Discovering Low-Precision Networks Close to Full-Precision Networks for Efficient Inference.
Proceedings of the Fifth Workshop on Energy Efficient Machine Learning and Cognitive Computing, 2019

2018
Low Precision Policy Distillation with Application to Low-Power, Real-time Sensation-Cognition-Action Loop with Neuromorphic Computing.
CoRR, 2018

Discovering Low-Precision Networks Close to Full-Precision Networks for Efficient Embedded Inference.
CoRR, 2018

2017
Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor.
IEEE Trans. Computers, 2017

2016
Mapping Generative Models onto a Network of Digital Spiking Neurons.
IEEE Trans. Biomed. Circuits Syst., 2016

Convolutional networks for fast, energy-efficient neuromorphic computing.
Proc. Natl. Acad. Sci. USA, 2016

Deep neural networks are robust to weight binarization and other non-linear distortions.
CoRR, 2016

Structured Convolution Matrices for Energy-efficient Deep learning.
CoRR, 2016


Real-time sensory information processing using the TrueNorth Neurosynaptic System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Visual saliency on networks of neurosynaptic cores.
IBM J. Res. Dev., 2015

Mapping Generative Models onto Networks of Digital Spiking Neurons.
CoRR, 2015

Backpropagation for Energy-Efficient Neuromorphic Computing.
Proceedings of the Advances in Neural Information Processing Systems 28: Annual Conference on Neural Information Processing Systems 2015, 2015

Gibbs sampling with low-power spiking digital neurons.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
A Multicast Tree Router for Multichip Neuromorphic Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations.
Proc. IEEE, 2014


2013

Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores.
Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

2012
Building block of a programmable neuromorphic substrate: A digital neurosynaptic core.
Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012

A superposable silicon synapse with programmable reversal potential.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

A Digital Neurosynaptic Core Using Event-Driven QDI Circuits.
Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

2011
Silicon-Neuron Design: A Dynamical Systems Approach.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
The thermodynamic temperature of a rhythmic spiking network
CoRR, 2010

2007
Synchrony in Silicon: The Gamma Rhythm.
IEEE Trans. Neural Networks, 2007

Corrections to "Expandable Networks for Neuromorphic Chips".
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Expandable Networks for Neuromorphic Chips.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

An in-silico Neural Model of Dynamic Routing through Neuronal Coherence.
Proceedings of the Advances in Neural Information Processing Systems 20, 2007

Silicon Neurons that Inhibit to Synchronize.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
Neuromorphic implementation of orientation hypercolumns.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Learning in Silicon: Timing is Everything.
Proceedings of the Advances in Neural Information Processing Systems 18 [Neural Information Processing Systems, 2005


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