John V. Arthur

According to our database, John V. Arthur authored at least 36 papers between 2005 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2024

11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm Chip.

Andrew S. Cassidy, John V. Arthur, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, William P. Risk, Kai Schleupen, Ben Shaw, Jay Sivagnaname, Daniel F. Smith, Ignacio Terrizzano, Takanori Ueda, Dharmendra S. Modha

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

IBM NorthPole Neural Inference Machine.

Dharmendra S. Modha, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, William P. Risk, Kai Schleupen, Ben Shaw, Jay Sivagnaname, Daniel F. Smith, Ignacio Terrizzano, Takanori Ueda

Proceedings of the 35th IEEE Hot Chips Symposium, 2023

2019

TrueNorth: Accelerating From Zero to 64 Million Neurons in 10 Years.

Michael V. DeBole, Brian Taba, Arnon Amir, Filipp Akopyan, Alexander Andreopoulos, William P. Risk, Jeff Kusnitz, Carlos Ortega Otero, Tapan K. Nayak, Rathinakumar Appuswamy, Peter J. Carlson, Andrew S. Cassidy, Pallab Datta, Steven K. Esser, Guillaume Garreau, Kevin L. Holland, Scott Lekuch, Michael Mastro, Jeffrey L. McKinstry, Carmelo di Nolfo, Brent Paulovicks, Jun Sawada, Kai Schleupen, Benjamin G. Shaw, Jennifer L. Klamo, Myron D. Flickner, John V. Arthur, Dharmendra S. Modha

Computer, 2019

Discovering Low-Precision Networks Close to Full-Precision Networks for Efficient Inference.

Jeffrey L. McKinstry, Steven K. Esser, Rathinakumar Appuswamy, Deepika Bablani, John V. Arthur, Izzet B. Yildiz, Dharmendra S. Modha

Proceedings of the Fifth Workshop on Energy Efficient Machine Learning and Cognitive Computing, 2019

2018

Low Precision Policy Distillation with Application to Low-Power, Real-time Sensation-Cognition-Action Loop with Neuromorphic Computing.

Jeffrey L. McKinstry, Davis R. Barch, Deepika Bablani, Michael DeBole, Steven K. Esser, Jeffrey A. Kusnitz, John V. Arthur, Dharmendra S. Modha

CoRR, 2018

Discovering Low-Precision Networks Close to Full-Precision Networks for Efficient Embedded Inference.

Jeffrey L. McKinstry, Steven K. Esser, Rathinakumar Appuswamy, Deepika Bablani, John V. Arthur, Izzet B. Yildiz, Dharmendra S. Modha

CoRR, 2018

2017

Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor.

Wei-Yu Tsai, Davis R. Barch, Andrew S. Cassidy, Michael V. DeBole, Alexander Andreopoulos, Bryan L. Jackson, Myron D. Flickner, John V. Arthur, Dharmendra S. Modha, John Sampson, Vijaykrishnan Narayanan

IEEE Trans. Computers, 2017

2016

Mapping Generative Models onto a Network of Digital Spiking Neurons.

Bruno U. Pedroni, Srinjoy Das, John V. Arthur, Paul A. Merolla, Bryan L. Jackson, Dharmendra S. Modha, Kenneth Kreutz-Delgado, Gert Cauwenberghs

IEEE Trans. Biomed. Circuits Syst., 2016

Convolutional networks for fast, energy-efficient neuromorphic computing.

Steven K. Esser, Paul A. Merolla, John V. Arthur, Andrew S. Cassidy, Rathinakumar Appuswamy, Alexander Andreopoulos, David J. Berg, Jeffrey L. McKinstry, Timothy Melano, Davis R. Barch, Carmelo di Nolfo, Pallab Datta, Arnon Amir, Brian Taba, Myron D. Flickner, Dharmendra S. Modha

Proc. Natl. Acad. Sci. USA, 2016

Deep neural networks are robust to weight binarization and other non-linear distortions.

Paul Merolla, Rathinakumar Appuswamy, John V. Arthur, Steven K. Esser, Dharmendra S. Modha

CoRR, 2016

Structured Convolution Matrices for Energy-efficient Deep learning.

Rathinakumar Appuswamy, Tapan K. Nayak, John V. Arthur, Steven K. Esser, Paul Merolla, Jeffrey L. McKinstry, Timothy Melano, Myron Flickner, Dharmendra S. Modha

CoRR, 2016

Truenorth ecosystem for brain-inspired computing: scalable systems, software, and applications.

Jun Sawada, Filipp Akopyan, Andrew S. Cassidy, Brian Taba, Michael V. DeBole, Pallab Datta, Rodrigo Alvarez-Icaza, Arnon Amir, John V. Arthur, Alexander Andreopoulos, Rathinakumar Appuswamy, Heinz Baier, Davis Barch, David J. Berg, Carmelo di Nolfo, Steven K. Esser, Myron Flickner, Thomas A. Horvath, Bryan L. Jackson, Jeff Kusnitz, Scott Lekuch, Michael Mastro, Timothy Melano, Paul A. Merolla, Steven E. Millman, Tapan K. Nayak, Norm Pass, Hartmut E. Penner, William P. Risk, Kai Schleupen, Benjamin G. Shaw, Hayley Wu, Brian Giera, Adam T. Moody, T. Nathan Mundhenk, Brian Van Essen, Eric X. Wang, David P. Widemann, Qing Wu, William E. Murphy, Jamie K. Infantolino, James A. Ross, Dale R. Shires, Manuel M. Vindiola, Raju Namburu, Dharmendra S. Modha

Proceedings of the International Conference for High Performance Computing, 2016

Real-time sensory information processing using the TrueNorth Neurosynaptic System.

Andreas G. Andreou, Andrew A. Dykman, Kate D. Fischl, Guillaume Garreau, Daniel R. Mendat, Garrick Orchard, Andrew S. Cassidy, Paul Merolla, John V. Arthur, Rodrigo Alvarez-Icaza, Bryan L. Jackson, Dharmendra S. Modha

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip.

Filipp Akopyan, Jun Sawada, Andrew Cassidy, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Nabil Imam, Yutaka Y. Nakamura, Pallab Datta, Gi-Joon Nam, Brian Taba, Michael P. Beakes, Bernard Brezzo, Jente B. Kuang, Rajit Manohar, William P. Risk, Bryan L. Jackson, Dharmendra S. Modha

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Visual saliency on networks of neurosynaptic cores.

Alexander Andreopoulos, Brian Taba, Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Myron Flickner, William P. Risk, Arnon Amir, Paul Merolla, John V. Arthur, David J. Berg, Jeffrey A. Kusnitz, Pallab Datta, Steven K. Esser, Rathinakumar Appuswamy, Davis Barch, Dharmendra S. Modha

IBM J. Res. Dev., 2015

Mapping Generative Models onto Networks of Digital Spiking Neurons.

Bruno U. Pedroni, Srinjoy Das, John V. Arthur, Paul Merolla, Bryan L. Jackson, Dharmendra S. Modha, Kenneth Kreutz-Delgado, Gert Cauwenberghs

CoRR, 2015

Backpropagation for Energy-Efficient Neuromorphic Computing.

Steven K. Esser, Rathinakumar Appuswamy, Paul Merolla, John V. Arthur, Dharmendra S. Modha

Proceedings of the Advances in Neural Information Processing Systems 28: Annual Conference on Neural Information Processing Systems 2015, 2015

Gibbs sampling with low-power spiking digital neurons.

Srinjoy Das, Bruno Umbria Pedroni, Paul Merolla, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Dharmendra S. Modha, Gert Cauwenberghs, Kenneth Kreutz-Delgado

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

A Multicast Tree Router for Multichip Neuromorphic Systems.

Paul Merolla, John V. Arthur, Rodrigo Alvarez-Icaza, Jean-Marie Bussat, Kwabena Boahen

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations.

Ben Varkey Benjamin, Peiran Gao, Emmett McQuinn, Swadesh Choudhary, Anand Chandrasekaran, Jean-Marie Bussat, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Kwabena Boahen

Proc. IEEE, 2014

Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution.

Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc González Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir, Steven K. Esser, Jeff Kusnitz, Rathinakumar Appuswamy, Chuck Haymes, Bernard Brezzo, Roger Moussalli, Ralph Bellofatto, Christian W. Baks, Michael Mastro, Kai Schleupen, Charles E. Cox, Ken Inoue, Steven E. Millman, Nabil Imam, Emmett McQuinn, Yutaka Y. Nakamura, Ivan Vo, Chen Guok, Don Nguyen, Scott Lekuch, Sameh W. Asaad, Daniel J. Friedman, Bryan L. Jackson, Myron Flickner, William P. Risk, Rajit Manohar, Dharmendra S. Modha

Proceedings of the International Conference for High Performance Computing, 2014

2013

Cognitive computing systems: Algorithms and applications for networks of neurosynaptic cores.

Steven K. Esser, Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Davis Barch, Arnon Amir, John V. Arthur, Andrew Cassidy, Myron Flickner, Paul Merolla, Shyamal Chandra, Nicola Basilico, Stefano Carpin, Tom Zimmerman, Frank Zee, Rodrigo Alvarez-Icaza, Jeffrey A. Kusnitz, Theodore M. Wong, William P. Risk, Emmett McQuinn, Tapan K. Nayak, Raghavendra Singh, Dharmendra S. Modha

Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores.

Andrew S. Cassidy, Paul Merolla, John V. Arthur, Steven K. Esser, Bryan L. Jackson, Rodrigo Alvarez-Icaza, Pallab Datta, Jun Sawada, Theodore M. Wong, Vitaly Feldman, Arnon Amir, Daniel Ben Dayan Rubin, Filipp Akopyan, Emmett McQuinn, William P. Risk, Dharmendra S. Modha

Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

2012

Building block of a programmable neuromorphic substrate: A digital neurosynaptic core.

John V. Arthur, Paul Merolla, Filipp Akopyan, Rodrigo Alvarez-Icaza, Andrew Cassidy, Shyamal Chandra, Steven K. Esser, Nabil Imam, William P. Risk, Daniel Ben Dayan Rubin, Rajit Manohar, Dharmendra S. Modha

Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012

A superposable silicon synapse with programmable reversal potential.

Ben Varkey Benjamin, John V. Arthur, Peiran Gao, Paul Merolla, Kwabena Boahen

Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

A Digital Neurosynaptic Core Using Event-Driven QDI Circuits.

Nabil Imam, Filipp Akopyan, John V. Arthur, Paul Merolla, Rajit Manohar, Dharmendra S. Modha

Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

2011

Silicon-Neuron Design: A Dynamical Systems Approach.

John V. Arthur, Kwabena A. Boahen

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm.

Paul Merolla, John V. Arthur, Filipp Akopyan, Nabil Imam, Rajit Manohar, Dharmendra S. Modha

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010

The thermodynamic temperature of a rhythmic spiking network

Paul Merolla, Tristan Ursell, John V. Arthur

CoRR, 2010

2007

Synchrony in Silicon: The Gamma Rhythm.

John V. Arthur, Kwabena A. Boahen

IEEE Trans. Neural Networks, 2007

Corrections to "Expandable Networks for Neuromorphic Chips".

Paul Merolla, John V. Arthur, Bertram E. Shi, Kwabena A. Boahen

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Expandable Networks for Neuromorphic Chips.

Paul Merolla, John V. Arthur, Bertram E. Shi, Kwabena A. Boahen

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

An in-silico Neural Model of Dynamic Routing through Neuronal Coherence.

Devarajan Sridharan, Brian Percival, John V. Arthur, Kwabena Boahen

Proceedings of the Advances in Neural Information Processing Systems 20, 2007

Silicon Neurons that Inhibit to Synchronize.

John V. Arthur, Kwabena Boahen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005

Neuromorphic implementation of orientation hypercolumns.

Thomas Y. W. Choi, Paul Merolla, John V. Arthur, Kwabena A. Boahen, Bertram E. Shi

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Learning in Silicon: Timing is Everything.

John V. Arthur, Kwabena Boahen

Proceedings of the Advances in Neural Information Processing Systems 18 [Neural Information Processing Systems, 2005