Maarten Kuijk

According to our database, Maarten Kuijk authored at least 33 papers between 2000 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Correction: Jegannathan et al. An Overview of CMOS Photodetectors Utilizing Current-Assistance for Swift and Efficient Photo-Carrier Detection. Sensors 2021, 21, 4576.

Gobinath Jegannathan, Volodymyr Seliuchenko, Thomas Van den Dries, Thomas Lapauw, Sven Boulanger, Hans Ingelberts, Maarten Kuijk

Sensors, 2022

2021

An Overview of CMOS Photodetectors Utilizing Current-Assistance for Swift and Efficient Photo-Carrier Detection.

Gobinath Jegannathan, Volodymyr Seliuchenko, Thomas Van den Dries, Thomas Lapauw, Sven Boulanger, Hans Ingelberts, Maarten Kuijk

Sensors, 2021

2020

Current-Assisted SPAD with Improved p-n Junction and Enhanced NIR Performance.

Gobinath Jegannathan, Thomas Van den Dries, Maarten Kuijk

Sensors, 2020

2019

A 5 ps resolution, 8.6 ns delay range digital delay line using combinatorial redundancy.

Thomas Van den Dries, Hans Ingelberts, Sven Boulanger, Maarten Kuijk

Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019

2018

Partial reset HDR image sensor with improved fixed pattern noise performance.

Volodymyr Seliuchenko, Sharath Patil, Marcelo Mizuki, Saad Ahmad, Maarten Kuijk

Proceedings of the Image Sensors and Imaging Systems 2018, 2018

2015

A Wideband Beamforming Lowpass Filter for 60 GHz Phased-Array Receivers.

Viki Szortyka, Kuba Raczkowski, Maarten Kuijk, Piet Wambacq

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS.

Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq

IEEE J. Solid State Circuits, 2015

2014

21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS.

Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2010

A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS.

Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas

IEEE J. Solid State Circuits, 2010

A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS.

Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009

A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS.

Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas

IEEE J. Solid State Circuits, 2009

A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA.

Jonathan Borremans, Steven Thijs, Piet Wambacq, Yves Rolain, Dimitri Linten, Maarten Kuijk

IEEE J. Solid State Circuits, 2009

A Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS.

Jonathan Borremans, Julien Ryckaert, Claude Desset, Maarten Kuijk, Piet Wambacq, Jan Craninckx

IEEE J. Solid State Circuits, 2009

A Standardized Knobs and Monitors RTL2RTL Insertion Methodology for Fine Grain SoC Tuning.

Ahmed Mohamed AbdelHamid, Ankur Anchlia, Stylianos Mamagkakis, Miguel Corbalan Miranda, Bart Dierickx, Maarten Kuijk

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008

Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS.

Jonathan Borremans, Piet Wambacq, Charlotte Soens, Yves Rolain, Maarten Kuijk

IEEE J. Solid State Circuits, 2008

A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS.

Jonathan Borremans, Andrea Bevilacqua, Stephane Bronckers, Morin Dehan, Maarten Kuijk, Piet Wambacq, Jan Craninckx

IEEE J. Solid State Circuits, 2008

A 1 × 64 Complementary Metal Oxide Semiconductor ranging sensor based on Current-Assisted Photonic Demodulators.

Ward van der Tempel, Daniel Van Nieuwenhove, Riemer Grootjans, Maarten Kuijk

Int. J. Intell. Syst. Technol. Appl., 2008

Time-Of-Flight distance sensor with enhanced dynamic range.

Daniel Van Nieuwenhove, Ward van der Tempel, Riemer Grootjans, Maarten Kuijk

Int. J. Intell. Syst. Technol. Appl., 2008

A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS.

Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS.

Jonathan Borremans, Piet Wambacq, Maarten Kuijk, Geert Carchon, Stefaan Decoutere

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A Single-Inductor Dual-Band VCO in a 0.06mm² 5.6GHz Multi-Band Front-End in 90nm Digital CMOS.

Jonathan Borremans, Stephane Bronckers, Piet Wambacq, Maarten Kuijk, Jan Craninckx

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A low-complexity, low phase noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOS.

Jonathan Borremans, Julien Ryckaert, Piet Wambacq, Maarten Kuijk, Jan Craninckx

Proceedings of the ESSCIRC 2008, 2008

2007

A switchable low-area 2.4-and-5 GHz dual-band LNA in digital CMOS.

Jonathan Borremans, Piet Wambacq, Geert Van der Plas, Yves Rolain, Maarten Kuijk

Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006

Wafer-level package interconnect options.

J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne

IEEE Trans. Very Large Scale Integr. Syst., 2006

Modeling of Substrate Noise Generation, Isolation, and Impact for an LC-VCO and a Digital Modem on a Lightly-Doped Substrate.

Charlotte Soens, Geert Van der Plas, Mustafa Badaroglu, Piet Wambacq, Stéphane Donnay, Yves Rolain, Maarten Kuijk

IEEE J. Solid State Circuits, 2006

Constant impedance scaling paradigm for interconnect synthesis.

J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne

Proceedings of the Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), 2006

Efficient Link Architecture for On-Chip Serial links and Networks.

J. Balachandran, Maarten Kuijk, Steven Brebels, Geert Carchon, Walter De Raedt, Bart Nauwelaers, Eric Beyne

Proceedings of the International Symposium on System-on-Chip, 2006

Constant Impedance Scaling Paradigm for Scaling LC transmission lines.

J. Balachandran, Steven Brebels, Geert Carchon, Walter De Raedt, Eric Beyne, Maarten Kuijk, Bart Nauwelaers

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

2005

Performance degradation of LC-tank VCOs by impact of digital switching noise in lightly doped substrates.

Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Maarten Kuijk

IEEE J. Solid State Circuits, 2005

2004

An 8-Gb/s capacitively coupled receiver with high common-mode rejection for uncoded data.

Xavier Maillard, Maarten Kuijk

IEEE J. Solid State Circuits, 2004

2002

A 900-Mb/s CMOS data recovery DLL using half-frequency clock.

Xavier Maillard, Frédéric Devisch, Maarten Kuijk

IEEE J. Solid State Circuits, 2002

2000

Asynchronous 250-Mb/s optical receivers with integrated detector in standard CMOS technology for optocoupler applications.

Cathleen Rooman, Daniël Coppée, Maarten Kuijk

IEEE J. Solid State Circuits, 2000

A power reduction method for off-chip interconnects.

Frédéric Devisch, Johan Stiens, Roger Vounckx, Maarten Kuijk

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000